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TC35680FSG Datasheet(PDF) 76 Page - Toshiba Semiconductor |
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TC35680FSG Datasheet(HTML) 76 Page - Toshiba Semiconductor |
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76 / 91 page  TC35680FSG-002/TC35681FSG-002 76 2019-04-04 5.7. AC Characteristics (Design Target Values) UART Interface Table 5-10 AC characteristics of UART interface Symbol Item Min. Typ. Max. Unit tCLDTDLY CTSX falling edge to data transmission start 192 — — ns tCHDTDLY CTSX rising edge to data transmission completion — — 2 Byte tRLDTDLY RTSX falling edge to data reception start 0 — — ns tRHDTDLY RTSX rising edge to data reception completion — — 8 Byte CTSX TXD tCLDTDLY START BIT0 BIT1 BIT2 BIT3 BIT4 BIT5 BIT6 BIT7 STOP tCHDTDLY tTXDIV RTSX RXD tRLDTDLY START BIT0 BIT1 BIT2 BIT3 BIT4 BIT5 BIT6 BIT7 STOP tRHDTDLY tRXDIV Figure 5-1 Timing chart of UART interface |
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