MPC8250VR datasheet(29/60 Pages) FREESCALE

29 / 60 page

MPC8250 Hardware Specifications, Rev. 1

Freescale Semiconductor

Pinout

This section provides the pin assignments and pinout list for the MPC8250.

4.1

ZU Package

The following figures and table represent the standard 480 TBGA package. For information on the

alternate package, refer to Section 4.2, “VR Package” on page 42.

1010_000

66/33 MHz

4/8

266 MHz

2.5

222 MHz

88 MHz

1010_001

66/33 MHz

4/8

266 MHz

88 MHz

1010_010

66/33 MHz

4/8

266 MHz

3.5

300 MHz

88 MHz

1010_011

66/33 MHz

4/8

266 MHz

350 MHz

88 MHz

1010_100

66/33 MHz

4/8

266 MHz

4.5

400 MHz

88 MHz

1011_000

66/33 MHz

4/8

266 MHz

212MHz

2.5

106 MHz

1011_001

66/33 MHz

4/8

266 MHz

2.5

265 MHz

2.5

106 MHz

1011_010

66/33 MHz

4/8

266 MHz

318 MHz

2.5

106 MHz

1011_011

66/33 MHz

4/8

266 MHz

3.5

371 MHz

2.5

106 MHz

1011_100

66/33 MHz

4/8

266 MHz

424 MHz

2.5

106 MHz

The frequency depends on the value of PCI_MODCK. If PCI_MODCK is high (logic ‘1’), the PCI frequency is

divided by 2 (33 instead of 66 MHz, etc.) and the CPM multiplication factor is multiplied by 2. Refer to Table 12

Input clock frequency is given only for the purpose of reference. User should set MODCK_H–MODCK_L so that

the resulting configuration does not exceed the frequency rating of the user’s part.

Core frequency = (60x bus frequency)(core multiplication factor)

Bus frequency = CPM frequency / bus division factor

In this mode, PCI_MODCK must be “1”.

Table 18. Clock Configuration Modes in PCI Agent Mode (continued)

MODCK_H

–

MODCK[1–

Input Clock

Frequency

(PCI) 1, 2

CPM

Multiplication

Factor1

CPM

Frequency

Core

Multiplication

Factor

Core

Frequency3

Bus Division

Factor

60x Bus

Frequency4

MPC8250VR Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc

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