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LP55281TL/NOPB Datasheet(PDF) 10 Page - Texas Instruments |
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LP55281TL/NOPB Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 42 page  SDA SCL 1 8 2 3 7 6 5 8 10 4 9 1 7 10 LP55281 SNVS458D – JUNE 2007 – REVISED OCTOBER 2016 www.ti.com Product Folder Links: LP55281 Submit Documentation Feedback Copyright © 2007–2016, Texas Instruments Incorporated (1) Data ensured by design. 6.7 I2C Timing Requirements VDD1,2 = 3 V to 4.5 V, VDDIO = 1.65 V to VDD1,2 (1) MIN MAX UNIT 1 Hold time (repeated) START condition 0.6 µs 2 Clock low time 1.3 µs 3 Clock high time 600 ns 4 Setup time for a repeated START Condition 600 ns 5 Data hold time 50 ns 6 Data setup time 100 ns 7 Rise time of SDA and SCL 20 + 0.1Cb 300 ns 8 Fall time of SDA and SCL 15 + 0.1Cb 300 ns 9 Set-up time for STOP condition 600 ns 10 Bus free time between a STOP and a START condition 1.3 µs Cb Capacitive load for each bus line 10 200 pF Figure 2. I2C Timing Diagram |
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