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ADF4208BRUZ-R7 Datasheet(PDF) 19 Page - Analog Devices |
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ADF4208BRUZ-R7 Datasheet(HTML) 19 Page - Analog Devices |
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19 / 24 page ![]() ADF4206/ADF4208 Rev. A | Page 19 of 24 RF2 Prescaler Value P6 in the RF2 AB counter latch sets the RF2 prescaler value. See Figure 29. RF2 Power-Down P7 in Figure 29 is the power-down bit for the RF2 side. RF SECTION (RF1) Programmable RF1 Reference (R) Counter If Control Bit C2 and Control Bit C1 are 1 and 0, the data is transferred from the input shift register to the 14-bit RF1 R counter. Figure 30 shows the input shift register data format for the RF1 R counter and the divide ratios that are possible. RF1 Phase Detector Polarity P9 sets the RF1 phase detector polarity. When the RF1 VCO characteristics are positive this is set to 1. When negative it is set to 0. See Figure 30. RF1 Charge Pump Three-State P10 puts the RF1 charge pump into three-state mode when programmed to a 1. It is set to 0 for normal operation. See Figure 30. RF1 Program Modes Figure 28 and Figure 30 show how to set up the program modes in the ADF420x family. RF1 Charge Pump Currents Bit P13 programs the current setting for the RF1 charge pump. See Figure 30. Programmable RF1 AB Counter If Control Bit C2 and Control Bit C1 are 1 and 1, then the data in the input register is used to program the RF1 AB counter. The AB counter is a 6-bit swallow counter (A counter) and 11-bit programmable counter (B counter). Figure 31 shows the input register data format for programming the RF1 AB counter and the divide ratios that are possible. RF1 Prescaler Value P14 in the RF1 A, B counter latch sets the RF1 prescaler value. See Figure 31. RF1 Power-Down Setting P16 in the RF1 AB counter high powers down RF1 side. RF Fast Lock The fast lock feature improves the lock time of the PLL. It increases charge pump current to a maximum for a time. Activate fast lock of the ADF420x family by setting P13 in the reference counter high and setting the fast lock switch on using MUXOUT. Switching in an external resistor using MUXOUT compensates the loop dynamics for the effect of increasing charge pump current. Setting P13 low removes the PLL from fast lock mode. |
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