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LCMXO2-640ZE-1TG100C Datasheet(PDF) 53 Page - Lattice Semiconductor |
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LCMXO2-640ZE-1TG100C Datasheet(HTML) 53 Page - Lattice Semiconductor |
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53 / 106 page  3-14 DC and Switching Characteristics MachXO2 Family Data Sheet Typical Building Block Function Performance – HC/HE Devices 1 Pin-to-Pin Performance (LVCMOS25 12mA Drive) Register-to-Register Performance Function -6 Timing Units Basic Functions 16-bit decoder 8.9 ns 4:1 MUX 7.5 ns 16:1 MUX 8.3 ns Function -6 Timing Units Basic Functions 16:1 MUX 412 MHz 16-bit adder 297 MHz 16-bit counter 324 MHz 64-bit counter 161 MHz Embedded Memory Functions 1024x9 True-Dual Port RAM (Write Through or Normal, EBR output registers) 183 MHz Distributed Memory Functions 16x4 Pseudo-Dual Port RAM (one PFU) 500 MHz 1. The above timing numbers are generated using the Diamond design tool. Exact performance may vary with device and tool version. The tool uses internal parameters that have been characterized but are not tested on every device. |
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