ISP1507CBS datasheet(13/74 Pages) NXP

13 / 74 page

ISP1507C_ISP1507D_1

Product data sheet

Rev. 01 — 28 May 2008

13 of 74

NXP Semiconductors

ISP1507C; ISP1507D

ULPI HS USB host and peripheral transceiver

Modes of operation

8.1 ULPI modes

The ISP1507 ULPI bus can be programmed to operate in four modes. Each mode

reconﬁgures the signals on the data bus as described in the following subsections. Setting

more than one mode will lead to undeﬁned behavior.

8.1.1 Synchronous mode

This is default mode. At power-up, and when CLOCK is stable, the ISP1507 will enter

synchronous mode. The link must synchronize all ULPI signals to CLOCK, meeting the

set-up and hold times as deﬁned in Section 15. A description of the ULPI pin behavior in

synchronous mode is given in Table 3.

This mode is used by the link to perform the following tasks:

• High-speed detection handshake (chirp)

• Transmit and receive USB packets

• Read and write to registers

• Receive USB status updates (RXCMDs)

For more information on various synchronous mode protocols, see Section 9.

Table 3.

ULPI signal description

Signal

name

Direction on

ISP1507

Signal description

CLOCK

60 MHz interface clock. If a crystal is attached or a clock is driven into

the XTAL1 pin, the ISP1507 will drive a 60 MHz output clock.

DATA[7:0] I/O

8-bit data bus. In synchronous mode, the link drives DATA[7:0] to LOW

by default. The link initiates transfers by sending a nonzero data pattern

called TXCMD (transmit command). In synchronous mode, the direction

of DATA[7:0] is controlled by DIR. Contents of DATA[7:0] lines must be

ignored for exactly one clock cycle whenever DIR changes value. This is

called the turnaround cycle.

Data lines have ﬁxed direction and different meaning in low-power and

serial modes.

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