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PIC24FJ64GA Datasheet(PDF) 45 Page - Microchip Technology

Part # PIC24FJ64GA
Description  PIC24FJXXXGA0XX Flash Programming Specification
PDF  52 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC24FJ64GA Datasheet(HTML) 45 Page - Microchip Technology

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© 2008 Microchip Technology Inc.
DS39768D-page 45
PIC24FJXXXGA0XX
5.4.2
PROGRAMMING VERIFICATION
After
the
programming
executive
has
been
programmed to executive memory using ICSP, it must
be verified. Verification is performed by reading out the
contents of executive memory and comparing it with
the image of the programming executive stored in the
programmer.
Reading the contents of executive memory can be
performed using the same technique described in
Section 3.8 “Reading Code Memory”. A procedure
for reading executive memory is shown in Table 5-6.
Note that in Step 2, the TBLPAG register is set to 80h,
such that executive memory may be read. The last
eight words of executive memory should be verified
with stored values of the Diagnostic and Calibration
Words to ensure accuracy.
TABLE 5-6:
READING EXECUTIVE MEMORY
Command
(Binary)
Data
(Hex)
Description
Step 1: Exit the Reset vector.
0000
0000
0000
000000
040200
000000
NOP
GOTO
0x200
NOP
Step 2: Initialize TBLPAG and the Read Pointer (W6) for TBLRD instruction.
0000
0000
0000
200800
880190
EB0300
MOV
#0x80, W0
MOV
W0, TBLPAG
CLR
W6
Step 3: Initialize the Write Pointer (W7) to point to the VISI register.
0000
0000
207847
000000
MOV
#VISI, W7
NOP
Step 4: Read and clock out the contents of the next two locations of executive memory through the VISI register
using the REGOUT command.
0000
0000
0000
0001
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
0000
0001
0000
BA0B96
000000
000000
<VISI>
000000
BADBB6
000000
000000
BAD3D6
000000
000000
<VISI>
000000
BA0BB6
000000
000000
<VISI>
000000
TBLRDL
[W6], [W7]
NOP
NOP
Clock out contents of VISI register
NOP
TBLRDH.B [W6++], [W7++]
NOP
NOP
TBLRDH.B [++W6], [W7--]
NOP
NOP
Clock out contents of VISI register
NOP
TBLRDL
[W6++], [W7]
NOP
NOP
Clock out contents of VISI register
NOP
Step 5: Reset the device internal PC.
0000
0000
040200
000000
GOTO
0x200
NOP
Step 6: Repeat Steps 4 and 5 until all desired code memory is read.



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