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EM357-RTR Datasheet(PDF) 153 Page - Silicon Laboratories |
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EM357-RTR Datasheet(HTML) 153 Page - Silicon Laboratories |
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153 / 241 page  153 Rev 1.3 TIM1_CCMR1: Address: 0x4000E018 Reset: 0x0 TIM2_CCMR1: Address: 0x4000F018 Reset: 0x0 Timer channels can be programmed as inputs (capture mode) or outputs (compare mode). The direction of channel y is defined by TIM_CCyS in this register. The other bits in this register have different functions in input and in output modes. The TIM_OC* fields only apply to a channel configured as an output (TIM_CCyS = 0), and the TIM_IC* fields only apply to a channel configured as an input (TIM_CCyS > 0). Register 9.5. TIMx_CCMR1 TIM1_CCMR1: Timer 1 Capture/Compare Mode Register 1 TIM2_CCMR1: Timer 2 Capture/Compare Mode Register 1 Bit 31 30 29 28 27 26 25 24 Name 0 0 0 0 0 0 0 0 Bit 23 22 21 20 19 18 17 16 Name 0 0 0 0 0 0 0 0 Bit 15 14 13 12 11 10 9 8 Name 0 TIM_OC2M TIM_OC2BE TIM_OC2FE TIM_CC2S TIM_IC2F TIM_IC2PSC Bit 7 6 5 4 3 2 1 0 Name 0 TIM_OC1M TIM_OC1BE TIM_OC1FE TIM_CC1S TIM_IC1F TIM_IC1PSC |
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