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LQFP64 Datasheet(PDF) 52 Page - STMicroelectronics

Part # LQFP64
Description  Programmable watchdog timer
PDF  103 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LQFP64 Datasheet(HTML) 52 Page - STMicroelectronics

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Electrical characteristics
SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3
52/103
Doc ID 16100 Rev 7
3.5
Thermal characteristics
3.5.1
Package thermal characteristics
3.5.2
General notes for specifications at maximum junction temperature
An estimation of the chip junction temperature, TJ, can be obtained from Equation 1:
Equation 1: TJ = TA + (RθJA * PD)
where:
TA = ambient temperature for the package (°C)
RθJA = junction-to-ambient thermal resistance (°C/W)
PD = power dissipation in the package (W)
The junction-to-ambient thermal resistance is an industry standard value that provides a
quick and easy estimation of thermal performance. Unfortunately, there are two values in
common usage: the value determined on a single layer board and the value obtained on a
board with two planes. For packages such as the PBGA, these values can be different by a
factor of two. Which value is closer to the application depends on the power dissipated by
other components on the board. The value obtained on a single layer board is appropriate
for the tightly packed printed circuit board. The value obtained on the board with the internal
planes is usually appropriate if the board has low power dissipation and the components are
well separated.
When a heat sink is used, the thermal resistance is expressed in Equation 2 as the sum of a
junction-to-case thermal resistance and a case-to-ambient thermal resistance:
Table 12.
LQFP thermal characteristics
Symbol
Parameter
Conditions
Typical value
Unit
100-pin
64-pin
RθJA
Thermal resistance junction-to-ambient, natural
convection(1)
Single layer board—1s
63
57
°C/W
Four layer board—2s2p
51
41
°C/W
RθJB
Thermal resistance junction-to-board(2)
Four layer board—2s2p
33
22
°C/W
RθJCtop Thermal resistance junction-to-case (top)
(3)
Single layer board—1s
15
13
°C/W
ΨJB
Junction-to-board, natural convection(4)
Operating conditions
33
22
°C/W
ΨJC
Junction-to-case, natural convection(5)
Operating conditions
1
1
°C/W
1.
Junction-to-ambient thermal resistance determined per JEDEC JESD51-7. Thermal test board meets JEDEC specification
for this package.
2.
Junction-to-board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification for
the specified package. When Greek letters are not available, the symbols are typed as RthJB or Theta-JB.
3.
Junction-to-case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is
used for the case temperature. Reported value includes the thermal resistance of the interface layer.
4.
Thermal characterization parameter indicating the temperature difference between the board and the junction temperature
per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JB.
5.
Thermal characterization parameter indicating the temperature difference between the package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written
as Psi-JC.



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