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7024S35FGI8 Datasheet(PDF) 8 Page - Integrated Device Technology |
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7024S35FGI8 Datasheet(HTML) 8 Page - Integrated Device Technology |
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8 / 22 page  6.42 IDT7024S/L High-Speed 4K x 16 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges 8 NOTES: 1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2). 2. This parameter is guaranteed by device characterization, but is not production tested. 3. To access RAM, CE = VIL, UB or LB = VIL, and SEM =VIH. To access semaphore, CE = VIH or UB & LB = VIH, and SEM =VIL. 4. 'X' in part number indicates power rating (S or L). AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(4) 7024X15 Com'l Only 7024X17 Com'l Only 7024X20 Com'l, Ind & Military 7024X25 Com'l & Military Unit Symbol Parameter Min.Max. Min. Max.Min. Max.Min.Max. READ CYCLE tRC Read Cycle Time 15 ____ 17 ____ 20 ____ 25 ____ ns tAA Address Access Time ____ 15 ____ 17 ____ 20 ____ 25 ns tACE Chip Enable Access Time(3) ____ 15 ____ 17 ____ 20 ____ 25 ns tABE Byte Enable Access Time(3) ____ 15 ____ 17 ____ 20 ____ 25 ns tAOE Output Enable Access Time ____ 10 ____ 10 ____ 12 ____ 13 ns tOH Output Hold from Address Change 3 ____ 3 ____ 3 ____ 3 ____ ns tLZ Output Low-Z Time(1,2) 3 ____ 3 ____ 3 ____ 3 ____ ns tHZ Output High-Z Time(1,2) ____ 10 ____ 10 ____ 12 ____ 15 ns tPU Chip Enable to Power Up Time(1,2) 0 ____ 0 ____ 0 ____ 0 ____ ns tPD Chip Disable to Power Down Time(1,2) ____ 15 ____ 17 ____ 20 ____ 25 ns tSOP Semaphore Flag Update Pulse (OE or SEM)10 ____ 10 ____ 10 ____ 10 ____ ns tSAA Semaphore Address Access(3) ____ 15 ____ 17 ____ 20 ____ 25 ns 2740 tbl 12a 7024X35 Com'l & Military 7024X55 Com'l, Ind & Military 7024X70 Military Only Unit Symbol Parameter Min.Max. Min.Max.Min. Max. READ CYCLE tRC Read Cycle Time 35 ____ 55 ____ 70 ____ ns tAA Address Access Time ____ 35 ____ 55 ____ 70 ns tACE Chip Enable Access Time(3) ____ 35 ____ 55 ____ 70 ns tABE Byte Enable Access Time(3) ____ 35 ____ 55 ____ 70 ns tAOE Output Enable Access Time ____ 20 ____ 30 ____ 35 ns tOH Output Hold from Address Change 3 ____ 3 ____ 3 ____ ns tLZ Output Low-Z Time(1,2) 3 ____ 3 ____ 3 ____ ns tHZ Output High-Z Time(1,2) ____ 15 ____ 25 ____ 30 ns tPU Chip Enable to Power Up Time(1,2) 0 ____ 0 ____ 0 ____ ns tPD Chip Disable to Power Down Time(1,2) ____ 35 ____ 50 ____ 50 ns tSOP Semaphore Flag Update Pulse (OE or SEM)15 ____ 15 ____ 15 ____ ns tSAA Semaphore Address Access(3) ____ 35 ____ 55 ____ 70 ns 2740 tbl 12b |
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