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KMM372F400CS Datasheet(PDF) 5 Page - Samsung semiconductor

Part # KMM372F400CS
Description  4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 3.3V
PDF  20 Pages
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KMM372F400CS Datasheet(HTML) 5 Page - Samsung semiconductor

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DRAM MODULE
KMM372F410CK/CS
KMM372F400CK/CS
Test condition : Vih/Vil=2.0/0.8V, Voh/Vol=2.0/0.8V, Output loading CL=100pF
Parameter
Symbol
-5
-6
Unit
Note
Min
Max
Min
Max
RAS to W dealy time
tRWD
71
83
ns
7,14
Column address to W delay time
tAWD
48
55
ns
7
CAS precharge time to W delay time
tCPWD
53
60
ns
CAS set-up time(CAS-before-RAS refresh)
tCSR
5
5
ns
14
CAS hold time(CAS-before-RAS refresh)
tCHR
8
8
ns
14
RAS to CAS precharge time
tRPC
3
3
ns
14
CAS precharge time (C-B-R counter test cycle)
tCPT
20
20
ns
Access time from CAS precharge
tCPA
33
40
ns
3,14
Hyper page cycle time
tHPC
25
30
ns
12
Hyper page read-modify-write cycle time
tHPRWC
68
77
ns
12
CAS precharge time(Hyper page cycle)
tCP
8
10
ns
RAS pulse width (Hyper page cycle)
tRASP
50
200K
60
200K
ns
RAS hold time from CAS precharge
tRHCP
35
40
ns
14
OE access time
tOEA
18
20
ns
14
OE to data delay
tOED
18
20
ns
14
Output buffer turn off delay time from OE
tOEZ
5
18
5
20
ns
6,11,14
OE command hold time
tOEH
13
15
ns
W to RAS precharge time(C-B-R refresh)
tWRP
15
15
ns
14
W to RAS hold time(C-B-R refresh)
tWRH
8
8
ns
14
Output data hold time
tDOH
10
10
ns
14
Output buffer turn off delay time from RAS
tREZ
3
13
3
15
ns
6.11.12
Output buffer turn off delay time from W
tWEZ
3
18
3
20
ns
6.11.14
W to data delay
tWED
20
20
ns
14
OE to CAS hold time
tOCH
5
5
ns
CAS hold time to OE
tCHO
5
5
ns
OE precharge time
tOEP
5
5
ns
W pulse width(Hyper page cycle)
tWPE
5
5
ns
PDE to Valid PD bit
tPD
10
10
ns
PDE to PD bit Inactive
tPDOFF
2
7
2
7
ns
Present Detect Read Cycle
AC CHARACTERISTICS (0
°C≤TA≤70°C, VCC=3.3V±0.3V. See notes 1,2.)



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