TCS34725 datasheet(21/41 Pages) OSRAM

21 / 41 page

Page 20

ams Datasheet

Document Feedback

[v1-04] 2020-Apr-10

TCS3472 − Register Description

The TCS3472 is controlled and monitored by data registers and

a command register accessed through the serial interface.

These registers provide for a variety of control functions and

can be read to determine results of the ADC conversions. The

Figure 24:

The mechanics of accessing a specific register depends on the

specific protocol used. See the section on I²C protocols on the

previous pages. In general, the COMMAND register is written

first to specify the specific control-status-data register for

subsequent read/write operations.

Address

R/W

Reset Value

−−

COMMAND

Specifies register address

0x00

ENABLE

R/W

Enables states and interrupts

0x00

0x01

ATIME

R/W

RGBC time

0xFF

0x03

WTIME

R/W

Wait time

0xFF

0x04

AILTL

R/W

Clear interrupt low threshold low byte

0x00

0x05

AILTH

R/W

Clear interrupt low threshold high byte

0x00

0x06

AIHTL

R/W

Clear interrupt high threshold low byte

0x00

0x07

AIHTH

R/W

Clear interrupt high threshold high byte

0x00

0x0C

PERS

R/W

Interrupt persistence filter

0x00

0x0D

CONFIG

R/W

Configuration

0x00

0x0F

CONTROL

R/W

Control

0x00

0x12

Device ID

0x13

STATUS

Device status

0x00

0x14

CDATAL

Clear data low byte

0x00

0x15

CDATAH

Clear data high byte

0x00

0x16

RDATAL

Red data low byte

0x00

0x17

RDATAH

Red data high byte

0x00

0x18

GDATAL

Green data low byte

0x00

0x19

GDATAH

Green data high byte

0x00

0x1A

BDATAL

Blue data low byte

0x00

0x1B

BDATAH

Blue data high byte

0x00

TCS34725 Datasheet(PDF) 21 Page - OSRAM GmbH

TCS34725 Datasheet(HTML) 21 Page - OSRAM GmbH

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

Datasheet Download

Link URL