LTM4601 datasheet(14/28 Pages) LINER

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LTM4601/LTM4601-1

4601f

Run Enable

The RUN pin is used to enable the power module. The

pin has an internal 5.1V zener to ground. The pin can be

driven with a logic input not to exceed 5V.

The RUN pin can also be used as an undervoltage lock out

(UVLO) function by connecting a resistor divider from the

input supply to the RUN pin:

UVLO =

•.

Power Good

The PGOOD pin is an open-drain pin that can be used to

monitor valid output voltage regulation. This pin monitors

a ±10% window around the regulation point and tracks

with margining.

COMP Pin

This pin is the external compensation pin. The module

has already been internally compensated for most output

voltages. Table 2 is provided for most application require-

ments. A spice model will be provided for other control

loop optimization.

PLLIN

The power module has a phase-locked loop comprised

of an internal voltage controlled oscillator and a phase

detector. This allows the internal top MOSFET turn-on

to be locked to the rising edge of the external clock. The

frequency range is ±30% around the operating frequency

of 850kHz. A pulse detection circuit is used to detect a

clock on the PLLIN pin to turn on the phase lock loop.

The pulse width of the clock has to be at least 400ns and

2V in amplitude. During the start-up of the regulator, the

phase-lock loop function is disabled.

INTVCC and DRVCC Connection

An internal low dropout regulator produces an internal

5V supply that powers the control circuitry and DRVCC

for driving the internal power MOSFETs. Therefore, if

the system does not have a 5V power rail, the LTM4601

can be directly powered by VIN. The gate driver current

through the LDO is about 20mA. The internal LDO power

dissipation can be calculated as:

PLDO_LOSS = 20mA • (VIN – 5V)

The LTM4601 also provides the external gate driver volt-

age pin DRVCC. If there is a 5V rail in the system, it is

recommended to connect DRVCC pin to the external 5V

rail. This is especially true for higher input voltages. Do

not apply more than 6V to the DRVCC pin. A 5V output can

be used to power the DRVCC pin with an external circuit

as shown in Figure 16.

Parallel Operation of the Module

The LTM4601 device is an inherently current mode con-

trolled device. Parallel modules will have very good current

sharing. This will balance the thermals on the design.

Figure 19 shows a schematic of the parallel design. The

voltage feedback equation changes with the variable n as

modules are paralleled:

OUT

60 4

η is the number of paralleled modules.

Figure 19 shows an LTM4601 and an LTM4601-1 used in a

parallel design. The 2nd LTM4601 device does not require

the remote sense ampliﬁer, therefore, the LTM4601-1 de-

vice is used. An LTM4601 device can be used without the

diff amp. VOSNS

+ can be tied to ground and the VOSNS– can

be tied to INTVCC. DIFFVOUT can ﬂoat. When using multiple

LTM4601-1 devices in parallel with an LTM4601, limit the

number to ﬁve for a total of six modules in parallel.

Thermal Considerations and Output Current Derating

The power loss curves in Figures 7 and 8 can be used

in coordination with the load current derating curves in

Figures 9 to 14 for calculating an approximate

θJA for the

module with various heat sinking methods. Thermal models

are derived from several temperature measurements at

the bench and thermal modeling analysis. Thermal Ap-

plication Note 103 provides a detailed explanation of the

analysis for the thermal models and the derating curves.

Tables 3 and 4 provide a summary of the equivalent

θJA

APPLICATIO S I FOR ATIO

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