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AP7331 Datasheet(PDF) 4 Page - Diodes Incorporated |
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AP7331 Datasheet(HTML) 4 Page - Diodes Incorporated |
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4 / 13 page ![]() AP7331 300mA, LOW QUIESCENT CURRENT, FAST TRANSIENT LOW DROPOUT LINEAR REGULATOR AP7331 Document number: DS31914 Rev. 3 - 2 4 of 13 www.diodes.com January 2011 © Diodes Incorporated Electrical Characteristics (TA = 25 oC, V IN = VOUT +1V, CIN = 1uF, COUT = 1uF, VEN = 2V, unless otherwise stated) Symbol Parameter Test Conditions Min Typ. Max Unit IQ Input Quiescent Current VEN = VIN, IOUT = 0mA ⎯ 55 75 μA VEN = VIN, IOUT = 300mA 65 85 ISHDN Input Shutdown Current VEN = 0V, IOUT = 0mA ⎯ 1 μA ILEAK Input Leakage Current VEN = 0V, OUT grounded ⎯ 1 μA VDropout Dropout Voltage (Note 4) IOUT = 300mA 300 550 mV VREF ADJ Reference Voltage (Adjustable version) IOUT= 0mA 0.4 V IADJ ADJ Leakage (Adjustable version) ⎯ 1 μA VOUT Output Voltage Accuracy TA = -40 oC to 85oC, IOUT = 30mA -2 2 % ΔV OUT / ΔV IN/V Line Regulation VIN = (VOUT +1V) to VIN-Max, VEN = VIN, IOUT = 1mA 0.01 0.20 %/V ΔV OUT /VOUT Load Regulation VIN = (VOUT +1V) to VIN-Max, IOUT from 1mA to 300mA -0.6 0.6 % tST Start-up Time VEN = 0V to 2.0V, VOUT = 1V, IOUT = 300mA 80 μs PSRR PSRR VIN = [VOUT +1V]VDC + 0.5VppAC, f = 100Hz, IOUT =30mA 65 dB ISHORT Short-circuit Current VIN = VIN-Min to VIN-Max, VOUT < 0.2V 100 mA ILIMIT Current Limit VOUT/ROUT = 1A 400 600 mA VIL EN Input Logic Low Voltage VIN = VIN-Min to VIN-Max 0.4 V VIH EN Input Logic High Voltage VIN = VIN-Min to VIN-Max 1.4 V IEN EN Input Current VIN = 0V or VIN-Max -1 1 μA TSHDN Thermal Shutdown Threshold 140 °C THYS Thermal Shutdown Hysteresis 15 °C θJA Thermal Resistance Junction-to-Ambient SOT25 (Note 5) 190 oC/W DFN2020-6 (Note 6) 167 oC/W Notes: 4. Dropout voltage is the voltage difference between the input and the output at which the output voltage drops 2% below its nominal value. This parameter only applies to output voltages above 1.8V. 5. Test conditions for SOT25: Device mounted on FR-4 substrate PCB, with minimum recommended pad layout, 2oz copper, single sided 6. Test conditions for DFN2020-6: Device mounted on FR-4 substrate PCB, with minimum recommended pad layout, 2oz copper, double sided, bottom layer is a copper plane. |
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