ZIOL2201 datasheet(47/91 Pages) ETC2

47 / 91 page

ZIOL2xxx – IC Family

IO-Link compliant HV Line Driver IC Family

Data Sheet

January 31, 2012

the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to

changes without notice.

47 of 90

An EEPROM single bit error indicates a one bit problem in the content of the EEPROM. Since the EEPROM

includes a self correction, one bit errors will be detected and corrected automatically. However, the indication shall

trigger a rewrite

17 of the entire EEPROM content.

The EEPROM 2-bit error indicates a two bit problem in the content of the EEPROM. That error is not

automatically corrected, so the content of the EEPROM can not be considered as correct. Thus a reprogramming

is absolutely required.

The valid-flag is used to indicate that the last write access to the EEPROM was successful. If the valid-flag

indicates a problem, then the chip configuration has to be regarded as faulty – no save IC function can be

guaranteed. Rewriting of the entire EEPROM content is necessary. In case of a regular write process to the

EEPROM is not completed, for instance by an interruption of the IC supply power within the ongoing write

process, the valid-flag will indicate this as a problem because of the EEPROM content might be corrupt.

Besides the signalization of IC-internal exceptions the IN_L pin signals also the system reset state. The system

reset state is indicated with active low on the INT_L pin.

Figure 3.14 Interrupt (INT_L pin) and Wake-up (WURQ_L pin) Signaling

reset OVL/OVT counter only

COM

OFF if IRQ_LOCK_COM == 1

AUX

OFF if IRQ_LOCK_AUX == 1

Both

OFF if IRQ_LOCK_OVT == 1

(COM and

IRQ_POWER_FAIL == 1

AUX)

AND

(8x)

NOR

IRQ

INT_L pin

(low active)

MON_RST_LOCK_OVT

MON_RST_LOCK_COM

MON_RST_LOCK_AUX

MON_RST_WURQ

MON_RST_POWER_FAIL

reserved

bit

reset

w / pulse

Memory

Control

IRQ_EN_LOCK_OVT

IRQ_EN_LOCK_COM

IRQ_EN_LOCK_AUX

IRQ_EN_EEPROM2_ERR

IRQ_EN_EEPROM_ERR

IRQ_EN_VALID_FLAG_ERR

IRQ_EN_WURQ

IRQ_EN_POWER_FAIL

bit

reset

r / w

WURQ_L pin config

DC/DC converter

AUX_LOCK Circuit

COM_LOCK Circuit

OVT_LOCK Circuit

Power Fail Detection

set

clear

set

clear

set

clear

set

clear

A write access to the MON_RST_LOCK_WURQ/MON_RST_COUNT

partial functionality assigned register bit if the write-data contain a 1 at to

this bit corresponding bit position.

For example, writing 0x08 to MON_RST_LOCK_WURQ will reset a

detected WURQ exception but not a possibly performed lock with respect to

the COM-channel, AUX-channel, and the over-temp detection circuit.

WURQ

INT_L pin

(low active)

INL_L pin config

WURQDETECT_LVL

WURQDETECT_CURRENT

WURQSOURCE

IRQ_NOREG

BOTH_CHANNEL_LOCK

DCDC_READY_DELAY

WURQ_PAD_MODE

IRQ_PAD_MODE

bit

reset

r / w

Driver OFF

Partial Reset via SPI

IRQ_LOCK_OVT

IRQ_LOCK_COM

IRQ_LOCK_AUX

IRQ_EEPROM2_ERR

IRQ_EEPROM_ERR

IRQ_VALID_FLAG_ERR

IRQ_WURQ

IRQ_POWER_FAIL

bit

reset

r / rst

Internal IC

Sensors for

Overload and

Over-

temperature

dectection

lock circuit reset (influences also reg[18])

MON_RST_OVT

MON_RST_COM_LS

MON_RST_COM_HS

MON_RST_AUX_LS

MON_RST_AUX_HS

reserved

bit

reset

w / pulse

Driver

Protection

Circuit

State Signals

WURQ Detection

set

clear

17 Note: IC versions ZIOL2xx2 do not allow any write access.

18 The in this an in the following figures used symbols for the IC registers are explained in Figure 9.1.

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