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AN3023 Datasheet(PDF) 10 Page - STMicroelectronics

Part # AN3023
Description  Using the analog-to-digital converter of the STM8A microcontroller
PDF  23 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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AN3023 Datasheet(HTML) 10 Page - STMicroelectronics

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Configuring ADC registers for conversion
AN3023
10/23
Doc ID 16113 Rev 1
3.1.3
Channel selection
There are up to 16 input channels in ADC and up to 12 input channels in ADC2 (the
maximum number of channels per ADC peripheral depends on the MCU package size).
External input channels can be selected by bits CH[3:0] in the ADC_CSR register. If the
channel is changed during an ongoing conversion, the current conversion is reset and a new
start pulse is sent to ADC.
3.1.4
Conversion on external trigger
Conversion can also be started by an external trigger event after ADC power ON.
The external trigger source can be a timer(b) TRGO event or a rising edge on the external
ADC_ETR(b) pin. Bit EXTTRIG is set in the ADC_CR2 register to enable the conversion by
external trigger and the bits EXTSEL[1:0] select the trigger source as either the timer or the
external trigger pin.
The different software sequences (shown below) to select the trigger source and enable the
external trigger depend on the ADC state (powered-ON or powered-OFF).
Case 1: ADC is in powered-ON state
ADC_CR2 = value1; Select the source (EXTSEL[1:0] bits)
ADC_CR2 |= 0x40; Enable external trigger (EXTTRIG bit)
Case 2: ADC is in powered-OFF state
When the ADC is in powered-OFF state, the user is free to choose between the above
software sequence, that is, for ADC powered-ON state or the sequence below:
ADC_CR2 = value; Select the source and enable the external trigger
3.1.5
Conversion modes
Single conversion mode
In single conversion mode, the ADC performs one conversion on the channel selected by
bits CH[3:0] in the ADC_CSR register. At the end of conversion, the EOC bit is set and the
result can be read from the registers ADC_DRH and ADC_DRL. The interrupt is generated
if the EOC interrupt is enabled in the ADC_CSR register.
Example 1
●
fMASTER = 16 MHz
●
fADC = 4 MHz
●
Channel = AIN1
●
Single conversion mode, left alignment mode
●
Starting ADC by software
b.
Refer to the datasheet for the details on the trigger source available.



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