48V

GND

OFF

OUT

IN

GATE

LM5050-1

OFF/ON

GND

GND

Q1

SUM40N10-30

+

R1

100:

1 PF

75V

D1

SS16T3

22 PF

63V

D2

SMBJ60A

VS

C1

0.1 PF

100V

S

D

G

IN

GATE

OUT

LM5050-1

GND

Parasitic

Inductance

Parasitic

Inductance

Shorted

Input

Reverse Recovery Current

VS

LM5050-1, LM5050-1-Q1

SNVS629E – MAY 2011 – REVISED DECEMBER 2015

www.ti.com

Application Information (continued)

8.1.2 Short Circuit Failure of an Input Supply

An abrupt 0-

Ω short circuit across the input supply will cause the highest possible reverse current to flow while

the internal LM5050-1 control circuitry discharges the gate of the MOSFET. During this time, the reverse current

case instantaneous reverse current would be limited to:

(1)

The internal Reverse Comparator will react, and will start the process of discharging the Gate, when the reverse

current reaches:

(2)

When the MOSFET is finally switched off, the energy stored in the parasitic wiring inductances will be transferred

to the rest of the circuit. As a result, the LM5050-1 IN pin will see a negative voltage spike while the OUT pin will

see a positive voltage spike. The IN pin can be protected by diode clamping the pin to GND in the negative

direction. The OUT pin can be protected with a TVS protection diode, a local bypass capacitor, or both. In low

voltage applications, the MOSFET drainto- source breakdown voltage rating may be adequate to protect the

breakdown rating, so this method should be used with caution.

Figure 23. Reverse Recovery Current Generates Inductive Spikes at VIN and VOUT pins.

8.2 Typical Applications

8.2.1 Typical Application With Input and Output Transient Protection

Figure 24. Typical Application With Input and Output Transient Protection Schematic

16

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