ADE7754ARRL datasheet(37/44 Pages) AD

37 / 44 page

REV. PrG 01/03

PRELIMINARY TECHNICAL DATA

ADE7754

– 37 –

Address

Default

[A5:A0]

Name

R/W*

Length

Value

Description

2Ch

AVRMS

Phase A Voltage channel RMS register.

2Dh

BVRMS

Phase B Voltage channel RMS register.

2Eh

CVRMS

Phase C Voltage channel RMS register.

2Fh

AIRMSOS

R/W

Phase A Current RMS offset correction register.

30h

BIRMSOS

R / W

Phase B Current RMS offset correction register.

31h

CIRMSOS

R/W

Phase C Current RMS offset correction register.

32h

AVRMSOS

R/W

Phase A Voltage RMS offset correction register.

33h

BVRMSOS

R / W

Phase B Voltage RMS offset correction register.

34h

CVRMSOS

R/W

Phase C Voltage RMS offset correction register.

35h

AAPGAIN

R / W

Phase A Active Power Gain Adjust. The Active Power accu-

mulation of the phase A can be calibrated by writing to this

scale of the Active Power. The resolution of the gain is

0.0244% / LSB - see Current channel Gain Adjust

36h

BAPGAIN

R / W

Phase B Active Power Gain Adjust

37h

CAPGAIN

R / W

Phase C Active Power Gain Adjust

38h

AVGAIN

R / W

Phase A voltage RMS gain. The Apparent Power accumula-

tion of the phase A can be calibrated by writing to this

scale of the Apparent Power. The resolution of the gain is

0.0244% / LSB - see Voltage RMS Gain Adjust

39h

BVGAIN

R/W

Phase B voltage RMS gain

3Ah

CVGAIN

R/W

Phase C voltage RMS gain

3Bh

Reserved

3Dh

3Eh

CHKSUM

Check sum register. The content of this register represents

the sum of all ones of the latest register read from the SPI

port.

3Fh

VERSION

Version of the Die

*R/W: Read/Write capability of the register.

R: Read only register.

R/W: Register that can be both read and written.

ADE7754ARRL Datasheet(PDF) 37 Page - Analog Devices

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