CS3160 datasheet(2/11 Pages) AMCC

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AMCC Confidential and Proprietary

Revision A – August 12, 2004

Data Sheet

S3160 – 2.5 Gbps Wide Bandwidth Transimpedance Amplifier

DETAILED DESCRIPTION

Figure 2 depicts the overall block diagram of the

S3160 transimpedance amplifier. The amplifier cir-

cuitry consists of a transimpedance stage and an

output driver stage with a 6 dB gain. The transimped-

ance amplifier converts the photodiode photocurrent to

a voltage. The photodiode can be biased by connect-

ing it to the RBYPASS pin or it can be connected

directly to VCC.

The amplifier gain is linear for an input of up to 300 µA.

Above that the transimpedance of the input stage is

reduced by the action of the schottky diode, to prevent

overdrive of the output stage. The output of the output

stage begins to fully limit when the input current

reaches 700 µA. The output voltage is limited at 1000

mV, differential, peak to peak.

The output of the transimpedance stage is converted

to a differential signal by the combination of the output

stage and a bias block. This bias block averages the

output of the transimpedance stage and establishes

the DC input reference for the output stage. The band-

width of this circuit is set by an on-chip capacitor, but

can be reduced by adding an off-chip capacitor, CFILT.

This bandwidth corresponds to the low frequency -3 dB

cutoff of the TIA. Increasing the value of CFILT will

reduce the low frequency -3 dB cutoff. With no CFILT

capacitor added it will be at 45 kHz.

Figure 2. S3160 Detailed Block Diagram

VCC

GND

RBYPASS

IIN

OUTP

OUTN

FILT

BIAS

FILT

(OPTIONAL)

100

Ω

V CC

1500

Ω

X 2

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