ADIN3310BBCZ datasheet(13/86 Pages) AD

13 / 86 page

Data Sheet

ADIN3310/ADIN6310

TIMING CHARACTERISTICS

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Rev. A | 13 of 86

POWER-UP, POWER-DOWN, AND RESET TIMING

Table 2. Power-Up Timing1, 2

Parameter

Description

Min

Typ

Max

Unit

tRAMP

Power supply ramp time3

0.1

Time from last power supply being applied to crystal settling

Time from last supply being applied to RESET_N released

100

μs

RESET_N rise time

100

Strap input setup time to RESET_N release

μs

Strap input hold time to RESET_N release

μs

RESET_N low time

μs

RESET_N low prior to supplies powering down

μs

RESET_N release to SPI interface available4

230

310

RESET_N release to the RGMII MAC interface available.

270

350

1 Specifications may be subject to change.

2 No specific power sequence is required; however, the preferred sequence has VDDCORE applied last and removed first. Example ordering sequence is VDD3P3 →

VDDIO_A → VDDCORE and this order is reversed when powering down.

3 Applies to all supply rails.

4 Includes bootloader and software configuration time.

Figure 3. Power-Up, Power-Down, and Reset Timing

ADIN3310BBCZ Datasheet(PDF) 13 Page - Analog Devices

ADIN3310BBCZ Datasheet(HTML) 13 Page - Analog Devices

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