© Nexperia B.V. 2017. All rights reserved

74LVC595A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 20 June 2014

4 of 20

Nexperia

74LVC595A

8-bit serial-in/serial-out or parallel-out shift register; 3-state

6.

Pinning information

6.1 Pinning

6.2 Pin description

(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to GND.

Fig 5.

Pin configuration SO16 and TSSOP16

Fig 6.

Pin configuration DHVQFN16

74LVC595A

Q1

VCC

Q2

Q0

Q3

DS

Q4

OE

Q5

STCP

Q6

SHCP

Q7

MR

GND

Q7S

001aaf569

1

2

3

4

5

6

7

8

10

9

12

11

14

13

16

15

Table 2.

Pin description

Symbol

Pin

Description

Q[0:7]

15, 1, 2, 3, 4, 5, 6, 7

parallel data output

GND

8

ground (0 V)

Q7S

9

serial data output

MR

10

master reset (active LOW)

SHCP

11

shift register clock input

STCP

12

storage register clock input

OE

13

output enable input (active LOW)

DS

14

serial data input

VCC

16

supply voltage