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74LVC595A

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Product data sheet

Rev. 2 — 20 June 2014

13 of 20

Nexperia

74LVC595A

8-bit serial-in/serial-out or parallel-out shift register; 3-state

Test data is given in Table 9. Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig 13. Test circuit for measuring switching times

Table 9.

Test data

Supply voltage

Input

Load

VEXT

VI

tr, tf

CL

RL

tPLH, tPHL

tPLZ, tPZL

tPHZ, tPZH

1.2 V

VCC

 2 ns

30 pF

1 k



open

2

 V

CC

GND

1.65 V to 1.95 V

VCC

 2 ns

30 pF

1 k



open

2

 V

CC

GND

2.3 V to 2.7 V

VCC

 2 ns

30 pF

500



open

2

 V

CC

GND

2.7V

2.7V

 2.5 ns

50 pF

500



open

2

 V

CC

GND

3.0Vto 3.6V

2.7V

 2.5 ns

50 pF

500



open

2

 V

CC

GND