TMP320C6720RFP300 datasheet(59/118 Pages) TI

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EM_D[31:16]/UHPI_HA[15:0](A)

UHPI_HCNTL[1:0]

UHPI_HD[15:0]

UHPI_HD[16]/HHWIL

UHPI_HD[31:17]

UHPI_HAS(B)

UHPI_HBE[3:0]

UHPI_HRW

UHPI_HDS[2]

UHPI_HDS[1]

UHPI_HCS

UHPI_HRDY

AMUTE2/HINT

A[x:y](C)

D[15:0]

D[16]

BE[3:0](D)

R/W

WE(E)

RD(E)

RDY

INTERRUPT

DSP

External Host MCU

D[31:17]

TMS320C6727B, TMS320C6726B, TMS320C6722B, TMS320C6720

Floating-Point Digital Signal Processors

www.ti.com

SPRS370E – SEPTEMBER 2006 – REVISED JULY 2008

Figure 4-16 illustrates the Multiplexed Host Address/Data Fullword Mode hookup between the C672x DSP

and an external host microcontroller. In this mode, all 32 bits of UHPI_HD[31:0] are used and the host can

access HPIA, HPID, and HPIC in a single bus cycle.

May be used as EM_D[31:16]

Optional for hosts supporting multiplexed address and data. Pull up if not used. Low when address is on the bus.

Two host address lines or host GPIO if address lines are not available.

Byte Enables (active during reads and writes). Some processors support a byte-enable mode on their write enable

pins.

Only required if needed for strobe timing. Not required if CS meets strobe timing requirements.

Figure 4-16. UHPI Multiplexed Host Address/Data Fullword Mode

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Peripheral and Electrical Specifications

TMP320C6720RFP300 Datasheet(PDF) 59 Page - Texas Instruments