MB39C011A datasheet(4/53 Pages) CYPRESS

4 / 53 page

Document Number: 002-08369 Rev. *B

Page 4 of 53

MB39C011A

2. Pin Description

Pin No.

Pin Name

I/O

Description

1VCC

Power supply pin for the reference voltage circuit and control circuit.

OUT1-1

Output pin for P-ch drive (drives the gate of the external High side FET).

OUT1-2

Output pin for N-ch drive (drives the gate of the external Low side FET).

I/O

Power supply pin for the N-ch FET drive circuit (VB

= 5 V).

5RT

Triangular-wave oscillation frequency setting resistor connection pin.

FB1

Error amplifier (Error Amp1) output pin.

-INE1

Error amplifier (Error Amp1) inverted input pin.

CSCP1

Timer-latch short-circuit protection circuit 1 capacitor connection pin.

CSCP2

Timer-latch short-circuit protection circuit 2 capacitor connection pin.

-INE2

Error amplifier (Error Amp2) inverted input pin.

FB2

Error amplifier (Error Amp2) output pin.

GND

Ground pin for the reference voltage circuit, control circuit, and output circuit.

CTL

Power supply control pin. IC becomes a stand-by mode by setting CTL pin “L” level.

OUT2-2

Output pin for N-ch drive (drives the gate of the external Low side FET).

OUT2-1

Output pin for P-ch drive (drives the gate of the external High side FET).

Power supply pin for the N-ch FET drive circuit (VH

= VCC − 5 V).

MB39C011A Datasheet(PDF) 4 Page - Cypress Semiconductor