PIC16F15213 datasheet(40/439 Pages) MICROCHIP

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Table 9-5. Core Registers

Addresses in BANKx

Core Registers

x00h or x80h

INDF0

x01h or x81h

INDF1

x02h or x82h

PCL

x03h or x83h

STATUS

x04h or x84h

FSR0L

x05h or x85h

FSR0H

x06h or x86h

FSR1L

x07h or x87h

FSR1H

x08h or x88h

BSR

x09h or x89h

WREG

x0Ah or x8Ah

PCLATH

x0Bh or x8Bh

INTCON

9.2.3

Special Function Register

The Special Function Registers (SFR) are registers used by the application to control the desired operation of

peripheral functions in the device. The SFRs occupy the first 20 bytes of the data banks 0-59 and the first 100 bytes

of the data banks 60-63, after the core registers.

The SFRs associated with the operation of the peripherals are described in the appropriate peripheral chapter of this

data sheet.

9.2.4

General Purpose RAM

There are up to 80 bytes of GPR in each data memory bank. The general purpose RAM can be accessed in a

non-banked method via the FSRs. This can simplify access to large memory structures.

Refer to the “Linear Data Memory” section in the “Memory Organization” chapter for details about linear memory

accessing.

9.2.5

Common RAM

There are 16 bytes of common RAM accessible from all banks.

9.2.6

Device Memory Maps

The memory maps for the devices in this data sheet are listed in the following figures.

PIC16F15213/14/23/24/43/44

Memory Organization

and its subsidiaries

Data Sheet

DS40002195E-page 40

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