PIC16F15213 datasheet(49/439 Pages) MICROCHIP

49 / 439 page

9.4.4

Branching

The branching instructions add an offset to the PC. This allows relocatable code and code that crosses page

boundaries. There are two forms of branching, BRW and BRA. The PC will have incremented to fetch the next

instruction in both cases. When using either branching instruction, a PCL memory boundary may be crossed.

If using BRW, load the W register with the desired unsigned address and execute BRW. The entire PC will be loaded

with the address PC + 1 + W.

If using BRA, the entire PC will be loaded with PC + 1 + the signed value of the operand of the BRA instruction.

9.5

Stack

All devices have a 16-level by 15-bit wide hardware stack. The stack space is not part of either program or data

space. The PC is PUSHed onto the stack when the CALL or CALLW instructions are executed or an interrupt causes

a branch. The stack is POPed in the event of a RETURN, RETLW or a RETFIE instruction execution. PCLATH is not

affected by a PUSH or POP operation.

The stack operates as a circular buffer if the STVREN Configuration bit is programmed to ‘0’. This means that after

the stack has been PUSHed sixteen times, the seventeenth PUSH overwrites the value that was stored from the first

PUSH. The eighteenth PUSH overwrites the second PUSH, and so on. The STKOVF and STKUNF flag bits will be

set on an Overflow/Underflow, regardless of whether the Reset is enabled.

If the STVREN bit is programmed to ‘1’, the device will be reset if the stack is PUSHed beyond the sixteenth level or

POPed beyond the fist level, setting the appropriate bits (STKOVF or STKUNF, respectively).

Important: There are no instructions/mnemonics called PUSH or POP. These are actions that occur

from the execution of the CALL, CALLW, RETURN, RETLW and RETFIE instructions or the vectoring to an

interrupt address.

9.5.1

Accessing the Stack

The stack is accessible through the TOSH, TOSL and STKPTR registers. STKPTR is the current value of the Stack

Pointer. The TOSH:TOSL register pair points to the TOP of the stack. Both registers are read/writable. TOS is split

into TOSH and TOSL due to the 15-bit size of the PC. To access the stack, adjust the value of STKPTR, which will

position TOSH:TOSL, then read/write to TOSH:TOSL. STKPTR also allows the detection of Overflow and Underflow

condition.

Important: Care must be taken when modifying STKPTR while interrupts are enabled.

During normal program operation, CALL, CALLW and interrupts will increment STKPTR, while RETLW, RETURN and

RETFIE will decrement STKPTR. STKPTR can be monitored to obtain the value of stack memory left at any given

time. STKPTR always points at the currently used place on the stack. Therefore, a CALL or CALLW will increment

STKPTR and then write the PC, and a return will unload the PC value from the stack and then decrement STKPTR.

Reference the following figures for examples of accessing the stack.

PIC16F15213/14/23/24/43/44

Memory Organization

and its subsidiaries

Data Sheet

DS40002195E-page 49

PIC16F15213 Datasheet(PDF) 49 Page - Microchip Technology