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PIC16F15213 Datasheet(PDF) 41 Page - Microchip Technology |
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PIC16F15213 Datasheet(HTML) 41 Page - Microchip Technology |
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41 / 439 page  Figure 9-4. Memory Map Banks 0 - 7 000h 00Bh Core Registers 080h 08Bh Core Registers 100h 10Bh Core Registers 180h 18Bh Core Registers 200h 20Bh Core Registers 280h 28Bh Core Registers 300h 30Bh Core Registers 380h 38Bh Core Registers 00Ch PORTA 08Ch — 10Ch RB4I2C (1) 18Ch SSP1BUF 20Ch TMR1L 28Ch T2TMR 30Ch CCPR1L 38Ch — 00Dh PORTB (1) 08Dh — 10Dh RB6I2C (1) 18Dh SSP1ADD 20Dh TMR1H 28Dh T2PR 30Dh CCPR1H 38Dh — 00Eh PORTC (2) 08Eh — 10Eh RC0I2C (3) 18Eh SSP1MSK 20Eh T1CON 28Eh T2CON 30Eh CCP1CON 38Eh — 00Fh — 08Fh — 10Fh RC1I2C (3) 18Fh SSP1STAT 20Fh T1GCON 28Fh T2HLT 30Fh CCP1CAP 38Fh — 010h — 090h — 110h — 190h SSP1CON1 210h T1GATE 290h T2CLK 310h CCPR2L 390h — 011h — 091h — 111h — 191h SSP1CON2 211h T1CLK 291h T2RST 311h CCPR2H 391h — 012h TRISA 092h — 112h — 192h SSP1CON3 212h — 292h — 312h CCP2CON 392h — 013h TRISB (1) 093h — 113h — 193h — 213h — 293h — 313h CCP2CAP 393h — 014h TRISC (2) 094h — 114h — 194h — 214h — 294h — 314h PWM3DCL 394h — 015h — 095h — 115h — 195h — 215h — 295h — 315h PWM3DCH 395h — 016h — 096h — 116h — 196h — 216h — 296h — 316h PWM3CON 396h — 017h — 097h — 117h — 197h — 217h — 297h — 317h — 397h — 018h LATA 098h — 118h — 198h — 218h — 298h — 318h PWM4DCL 398h — 019h LATB (1) 099h — 119h RC1REG 199h — 219h — 299h — 319h PWM4DCH 399h — 01Ah LATC (2) 09Ah CPCON 11Ah TX1REG 19Ah — 21Ah — 29Ah — 31Ah PWM4CON 39Ah — 01Bh — 09Bh ADRESL 11Bh SP1BRGL 19Bh — 21Bh — 29Bh — 31Bh — 39Bh — 01Ch — 09Ch ADRESH 11Ch SP1BRGH 19Ch — 21Ch — 29Ch — 31Ch — 39Ch — 01Dh — 09Dh ADCON0 11Dh RC1STA 19Dh — 21Dh — 29Dh — 31Dh — 39Dh — 01Eh — 09Eh ADCON1 11Eh TX1STA 19Eh — 21Eh — 29Eh — 31Eh — 39Eh — 01Fh — 09Fh ADACT 11Fh BAUD1CON 19Fh — 21Fh — 29Fh — 31Fh — 39Fh — 020h 0A0h 120h 1A0h 220h 2A0h 320h 32Fh General Purpose Registers 16 Bytes (4) 3A0h 06Fh 0EFh 16Fh 1EFh 26Fh 2EFh 330h 36Fh Unimplemented Read as '0' 3EFh 070h 07Fh Common RAM (Accesses 70h‐7Fh) 0F0h 0FFh Common RAM (Accesses 70h‐7Fh) 170h 17Fh Common RAM (Accesses 70h‐7Fh) 1F0h 1FFh Common RAM (Accesses 70h‐7Fh) 270h 27Fh Common RAM (Accesses 70h‐7Fh) 2F0h 2FFh Common RAM (Accesses 70h‐7Fh) 370h 37Fh Common RAM (Accesses 70h‐7Fh) 3F0h 3FFh Common RAM (Accesses 70h‐7Fh) Note: BANK 7 General Purpose Registers 80 Bytes General Purpose Registers 80 Bytes General Purpose Registers 80 Bytes General Purpose Registers 80 Bytes (4) BANK 0 BANK 2 BANK 1 BANK 3 General Purpose Registers 80 Bytes (4) General Purpose Registers 80 Bytes (4) Unimplemented Read as '0' Legend: Unimplemented data memory locations, read as '0' 1. 20-pin devices only BANK 6 BANK 4 BANK 5 2. 14/20-pin devices only 3. 14-pin devices only 4. PIC16F15214/24/44 only Figure 9-5. Memory Map Banks 8 - 15 400h 40Bh Core Registers 480h 48Bh Core Registers 500h 50Bh Core Registers 580h 58Bh Core Registers 600h 60Bh Core Registers 680h 68Bh Core Registers 700h 70Bh Core Registers 780h 78Bh Core Registers 40Ch — 48Ch — 50Ch — 58Ch — 60Ch — 68Ch — 70Ch PIR0 78Ch — 40Dh — 48Dh — 50Dh — 58Dh — 60Dh — 68Dh — 70Dh PIR1 78Dh — 40Eh — 48Eh — 50Eh — 58Eh — 60Eh — 68Eh — 70Eh PIR2 78Eh — 40Fh — 48Fh — 50Fh — 58Fh — 60Fh — 68Fh — 70Fh — 78Fh — 410h — 490h — 510h — 590h — 610h — 690h — 710h — 790h — 411h — 491h — 511h — 591h — 611h — 691h — 711h — 791h — 412h — 492h — 512h — 592h — 612h — 692h — 712h — 792h — 413h — 493h — 513h — 593h — 613h — 693h — 713h — 793h — 414h — 494h — 514h — 594h — 614h — 694h — 714h — 794h — 415h — 495h — 515h — 595h — 615h — 695h — 715h — 795h — 416h — 496h — 516h — 596h — 616h — 696h — 716h PIE0 796h — 417h — 497h — 517h — 597h — 617h — 697h — 717h PIE1 797h — 418h — 498h — 518h — 598h — 618h — 698h — 718h PIE2 798h — 419h — 499h — 519h — 599h — 619h — 699h — 719h — 799h — 41Ah — 49Ah — 51Ah — 59Ah — 61Ah — 69Ah — 71Ah — 79Ah — 41Bh — 49Bh — 51Bh — 59Bh — 61Bh — 69Bh — 71Bh — 79Bh — 41Ch — 49Ch — 51Ch — 59Ch TMR0L 61Ch — 69Ch — 71Ch — 79Ch — 41Dh — 49Dh — 51Dh — 59Dh TRM0H 61Dh — 69Dh — 71Dh — 79Dh — 41Eh — 49Eh — 51Eh — 59Eh T0CON0 61Eh — 69Eh — 71Eh — 79Eh — 41Fh — 49Fh — 51Fh — 59Fh T0CON1 61Fh — 69Fh — 71Fh — 79Fh — 420h 4A0h 520h 5A0h 620h 6A0h 720h 7A0h 46Fh 4EFh 56Fh 5EFh 66Fh 6EFh 76Fh 7EFh 470h 47Fh Common RAM (Accesses 70h‐7Fh) 4F0h 4FFh Common RAM (Accesses 70h‐7Fh) 570h 57Fh Common RAM (Accesses 70h‐7Fh) 5F0h 5FFh Common RAM (Accesses 70h‐7Fh) 670h 67Fh Common RAM (Accesses 70h‐7Fh) 6F0h 6FFh Common RAM (Accesses 70h‐7Fh) 770h 77Fh Common RAM (Accesses 70h‐7Fh) 7F0h 7FFh Common RAM (Accesses 70h‐7Fh) Unimplemented Read as '0' Unimplemented Read as '0' Unimplemented Read as '0' Legend: Unimplemented data memory locations, read as '0' Unimplemented Read as '0' Unimplemented Read as '0' Unimplemented Read as '0' Unimplemented Read as '0' Unimplemented Read as '0' BANK 14 BANK 15 BANK 8 BANK 9 BANK 10 BANK 11 BANK 12 BANK 13 PIC16F15213/14/23/24/43/44 Memory Organization © 2020-2022 Microchip Technology Inc. and its subsidiaries Data Sheet DS40002195E-page 41 |
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