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DSPIC33F Datasheet(PDF) 69 Page - Microchip Technology |
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DSPIC33F Datasheet(HTML) 69 Page - Microchip Technology |
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69 / 80 page ![]() © 2007 Microchip Technology Inc. Preliminary DS70152D-page 69 dsPIC33F/PIC24H PROGRAMMING SPECIFICATION Step 7: Load W0:W5 with the next 4 words of packed programming executive code and initialize W6 for programming. Programming starts from the base of executive memory (0x800000) using W6 as a read pointer and W7 as a write pointer. 0000 0000 0000 0000 0000 0000 2<LSW0>0 2<MSB1:MSB0>1 2<LSW1>2 2<LSW2>3 2<MSB3:MSB2>4 2<LSW3>5 MOV #<LSW0>, W0 MOV #<MSB1:MSB0>, W1 MOV #<LSW1>, W2 MOV #<LSW2>, W3 MOV #<MSB3:MSB2>, W4 MOV #<LSW3>, W5 Step 8: Set the read pointer (W6) and load the (next four write) latches. 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 EB0300 000000 BB0BB6 000000 000000 BBDBB6 000000 000000 BBEBB6 000000 000000 BB1BB6 000000 000000 BB0BB6 000000 000000 BBDBB6 000000 000000 BBEBB6 000000 000000 BB1BB6 000000 000000 CLR W6 NOP TBLWTL [W6++], [W7] NOP NOP TBLWTH.B[W6++], [W7++] NOP NOP TBLWTH.B[W6++], [++W7] NOP NOP TBLWTL [W6++], [W7++] NOP NOP TBLWTL [W6++], [W7] NOP NOP TBLWTH.B[W6++], [W7++] NOP NOP TBLWTH.B[W6++], [++W7] NOP NOP TBLWTL [W6++], [W7++] NOP NOP Step 9: Repeat Steps 7-8 sixteen times to load the write latches for the 64 instructions. Step 10: Initiate the programming cycle. 0000 0000 0000 A8E761 000000 000000 BSET NVMCON, #15 NOP NOP Step 11: Wait for the Row Program operation to complete. - 0000 0000 0000 0001 - 807600 887840 000000 <VISI> Externally time ‘P13’ msec (see Section TABLE 8-1: “AC/DC Characteristics and Timing Requirements” ) to allow suffi- cient time for the Page Erase operation to complete. MOV NVMCON, W0 MOV W0, VISI NOP Clock out contents of VISI register. Repeat until the WR bit is clear. TABLE 6-1: PROGRAMMING THE PROGRAMMING EXECUTIVE (CONTINUED) Command (Binary) Data (Hex) Description |
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