MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER

MP2176 Rev. 1.0

www.MonolithicPower.com

15

4/17/2018

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Over-Current Protection (OCP)

The MP2176 enters over-current protection

(OCP) mode when the inductor current reaches

the current limit and attempts to recover from

the over-current fault with hiccup mode. In

OCP, the chip disables the output power stage,

discharges the soft-start capacitor, and then

attempts to soft-start again automatically. If the

over-current condition still remains after the soft

start ends, the chip repeats this operation cycle

until the over-current condition is removed and

the output rises back to the regulation level.

The MP2176 also operates in hiccup mode

when a short circuit occurs.

Power Good (PG)

The MP2176 has a power-good (PG) output

that can be connected to VCC or another voltage

source through a resistor (e.g.: 100k

Ω). When

the MP2176 is powered on, and VFB is above

90% of VREF, PG is pulled high.

When VFB drops to 70% of VREF or the part is

not powered on, PG is pulled low.

Soft Start/Stop (SS)

The MP2176 employs a soft-start/-stop (SS)

mechanism to ensure a smooth output during

power-up and power-down.

When EN rises high, an internal current source

(8

μA) charges up the SS capacitor (C6). The

SS capacitor voltage takes over VREF to the

PWM comparator. The output voltage ramps up

smoothly with the SS voltage (VSS). Once VSS

reaches the same level as VREF, VSS continues

ramping up while VREF takes over the PWM

comparator. At this point, the soft start finishes,

and the device enters steady-state operation.

When EN is pulled low, the SS cap voltage is

discharged through an 8µA internal current

source. Once VSS reaches VREF, it takes over

the PWM comparator. The output voltage

decreases smoothly with VSS until it reaches

zero.

The

SS

capacitor

value

can

be

determined with Equation (9):

SS

SS

SS

REF

t (ms) I ( A)

C (nF)

V





(9)

If

the

output

capacitors

have

a

large

capacitance value, the SS time should not be

too small. Otherwise, the current limit can be

reached easily during SS. A minimum value of

4.7nF should be used if the output capacitance

value is larger tha

n 330μF.

Over-/Under-Voltage Protection (OVP/UVP)

The MP2176 has non-latching over-voltage

protection (OVP). The device monitors the

output voltage through a resistor divider VFB to

detect an over-voltage condition on the output.

When VFB is higher than 120% of VREF (0.610V),

the LS-FET is turned on while the HS-FET is

off. The LS-FET remains on until it reaches the

negative current limit and turns off for 100ns. If

the over-voltage condition still remains, the chip

repeats this operation cycle until VFB drops

below 110% of VREF.

When VFB is below 50% of VREF (0.610V), this is

recognized as an under-voltage (UV) condition.

Usually,

under-voltage

protection

(UVP)

is

caused by an over-current (OC) condition and

results in over-current protection (OCP).

Configuring the EN Control

EN provides an electrical on/off control of the

device. Drive EN high to turn on the regulator.

Drive EN low to turn off the regulator. Do not

float EN.

For automatic start-up, EN can be pulled up to

the input voltage through a resistive voltage

divider.

Determine

the

automatic

start-up

voltage by choosing the values of the pull-up

resistor (RUP from IN to EN) and the pull-down

resistor (RDOWN from EN to GND) with Equation

(10):

UP

DOWN

IN START

DOWN

RR

V

1.4

R







(10)

For example, when RUP = 100kΩ and RDOWN =

51kΩ, VIN-START is 4.15V.

To prevent noise, use a 10nF ceramic capacitor

from EN to GND.

Pre-Bias Start-Up

If the output is pre-biased to a certain voltage

during

start-up,

the MP2176

disables

the

switching of both the high-side and low-side

switches until the voltage on the internal soft-