MOTOROLA

TIMING SOLUTIONS

12

Figure 17. Cycle–to–cycle Jitter

Figure 18. Period Jitter

The variation in cycle time of a signal between adjacent cycles, over a

random sample of adjacent cycle pairs

The deviation in cycle time of a signal with respect to the ideal period over

a random sample of cycles

TN

TJIT(CC) = |TN–TN+1|

TN+1

TJIT(P) = |TN–1/f0|

T0

tF

tR

VCC=3.3 V VCC=2.5 V

2.4

1.8 V

0.55

0.6 V

Figure 19. I/O Jitter

Figure 20. Output Transition Time Test Reference

TJIT(

∅) = |T0–T1mean|

CCLK

FB_IN

The deviation in t0 for a controlled edge with respect to a t0 mean in a

random sample of cycles

(PCLK)

Freescale Semiconductor, Inc.

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Go to: www.freescale.com