VS6663CD datasheet(52/64 Pages) STMICROELECTRONICS

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Electrical characteristics

VS6663CD

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Doc ID027033 Rev 2

7.7

CCP2 interface

7.7.1

CCP2 interface - DC specification

7.7.2

CCP2 interface - timing characteristics

The parameters in Table 34 are measured across a terminated 100

Ω transmission line, in

data/strobe mode.

Table 33. CCP2 interface - DC specification

Symbol

Parameter

Minimum

Typical

Maximum

Unit

VOD

Differential voltage swing(1)

Measured over a 100

Ω load

100

150

200

VCM

Common mode voltage (self biasing)

0.8

0.9

1.0

Output Impedance

140

IDR

Drive current range

(internally set by bias circuit)

0.5

1.5

PSRR(2)

Nominal value for the interference at VCM voltage through digital supply relative to the interference at digital

supply over the 0-1 GHz operating range. PSRR = 20*log10 (VDIG interference (peak-to-peak) / VCM

interference (peak-to-peak))

0 - 100MHz

100 - 1000MHz

Table 34. CCP2 interface - timing characteristics

Symbol

Parameter

Min.

Max.

Unit

Average data frequency

640

Mbits/s

Average data period

1.56

Tjitter

(1)

TPmax-TPmin

Data period Jitter

200

tstable

Both data and clock at the stable level

780

Trise

Rise time of DATA+/DATA-

,CLK+/CLK-

300

400

Tfall

Fall time of DATA+/DATA-,

CLK+/CLK-

300

400

Tskew

(2)

Tskew =Tcmpskew + Tchcskew

Total skew between signals

225

tPWR

Power up/down time

μs

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