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AM652X Datasheet(PDF) 221 Page - Texas Instruments

Part # AM652X
Description  AM654x, AM652x Sitara™ Processors Silicon Revision 2.1
PDF  284 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM652X Datasheet(HTML) 221 Page - Texas Instruments

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Table 7-64. Switching Characteristics for MMCi - SDR104, HS200 Mode
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
SDR1041
fop(clk)
Operating frequency, MMCi_CLK
200
MHz
SDR1042H tw(clkH)
Pulse duration, MMCi_CLK high
2.08
ns
SDR1042L tw(clkL)
Pulse duration, MMCi_CLK low
2.08
ns
SDR1045
td(clkH-cmdV)
Delay time, MMCi_CLK rising clock edge to MMCi_CMD transition
1.12
3.16
ns
SDR1046
td(clkH-dV)
Delay time, MMCi_CLK rising clock edge to MMCi_DAT[j:0]
transition
1.12
3.16
ns
Figure 7-83. eMMC/SD/SDIO in - High Speed SDR104, HS200 - Transmitter Mode
For more information, see section Multimedia Card/Secure Digital (eMMC/SD/SDIO) Interface in the device
TRM.
7.9.5.17 CPTS
Table 7-65 presents CPTS Timing Conditions.
Table 7-65. CPTS Timing Conditions
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input slew rate
0.5
5
V/ns
OUTPUT CONDITIONS
CL
Output load capacitance
2
10
pF
Section 7.9.5.17.1, Section 7.9.5.17.2, Figure 7-84, and Figure 7-85 present timing requirement and switching
characteristics of the CPTS interface.
7.9.5.17.1 CPTS Timing Requirements
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
T1
tw(HWTSPUSHH)
HWnTSPUSH(2) pulse duration, high
6 + 12P
(1)
ns
T2
tw(HWTSPUSHL)
HWnTSPUSH(2) pulse duration, low
6 + 12P
(1)
ns
T3
tc(RFT_CLK)
RFT_CLK cycle time
5
8
ns
T4
tw(RFT_CLKH)
RFT_CLK pulse duration, high
0.45 * T(3)
ns
T5
tw(RFT_CLKL)
RFT_CLK pulse duration, low
0.45 * T(3)
ns
(1)
P = functional clock period in ns.
(2)
In HWnTSPUSH, n = 1 to 2.
(3)
T = RFT_CLK period in ns.
www.ti.com
AM6548, AM6528, AM6546, AM6526
SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: AM6548 AM6528 AM6546 AM6526



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