Clock operation

M41T00CAP

requires a pull-up resistor to VCC for proper operation. A 500-10 kW resistor is

recommended in order to control the rise time. The FT bit is cleared on power-down.

Figure 10: Crystal acccuracy across temperature

Figure 11: Clock calibration

3.3

Century bit

Bits D7 and D6 of clock register 02h contain the century enable bit (CEB) and the century

bit (CB). Setting CEB to a '1' will cause CB to toggle, either from a '0' to '1' or from '1' to '0'

at the turn of the century (depending upon its initial state). If CEB is set to a '0,' CB will not

toggle.

AI07888

–160

0

10

20

30

40

50

60

70

Frequency (ppm)

Temperature

°C

80

–10

–20

–30

–40

–100

–120

–140

–40

–60

–80

20

0

–20

= –0.036 ppm/

°C2 ± 0.006 ppm/°C2

K

∆F = K x(T –T

O)

2

F

T

O = 25°C ± 5°C

AI00594B

NORMAL

POSITIVE

CALIBRATION

NEGATIVE

CALIBRATION

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