PIC18F1XK50 datasheet(100/422 Pages) MICROCHIP

100 / 422 page

PIC18F/LF1XK50

DS41350D-page 100

Preliminary

 2010 Microchip Technology Inc.

9.5

Port Slew Rate Control

The output slew rate of each port is programmable to

select either the standard transition rate or a reduced

transition rate of 0.1 times the standard to minimize

EMI. The reduced transition time is the default slew

rate for all ports.

SLRCON: SLEW RATE CONTROL REGISTER

U-0

R/W-1

—

SLRC

SLRB

SLRA

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-3

Unimplemented: Read as ‘0’

bit 2

SLRC: PORTC Slew Rate Control bit

1 = All outputs on PORTC slew at 0.1 times the standard rate

0 = All outputs on PORTC slew at the standard rate

bit 1

SLRB: PORTB Slew Rate Control bit

1 = All outputs on PORTB slew at 0.1 times the standard rate

0 = All outputs on PORTB slew at the standard rate

bit 0

SLRA: PORTA Slew Rate Control bit

1 = All outputs on PORTA slew at 0.1 times the standard rate(1)

0 = All outputs on PORTA slew at the standard rate

Note 1: The slew rate of RA4 defaults to standard rate when the pin is used as CLKOUT.

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