Electronic Components Datasheet Search
  Indian  ▼
ALLDATASHEET.IN

X  

STE100P Datasheet(PDF) 18 Page - STMicroelectronics

Part # STE100P
Description  10/100 FAST ETHERNET 3.3V TRANSCEIVER
PDF  31 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STE100P Datasheet(HTML) 18 Page - STMicroelectronics

Back Button STE100P_06 Datasheet HTML 14Page - STMicroelectronics STE100P_06 Datasheet HTML 15Page - STMicroelectronics STE100P_06 Datasheet HTML 16Page - STMicroelectronics STE100P_06 Datasheet HTML 17Page - STMicroelectronics STE100P_06 Datasheet HTML 18Page - STMicroelectronics STE100P_06 Datasheet HTML 19Page - STMicroelectronics STE100P_06 Datasheet HTML 20Page - STMicroelectronics STE100P_06 Datasheet HTML 21Page - STMicroelectronics STE100P_06 Datasheet HTML 22Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 18 / 31 page
background image
STE100P
18/31
7.9 LED Display Operation
The STE100P provides 5 LED pins, the detail descriptions about the operation are described in the PIN
Description section, and as follows.
Speed LED: 100Mbps(on) or 10Mbps(off)
Receive LED: Blinks at 10Hz when receiving, but not colliding
Transmit LED: Blinks at 10Hz when transmitting, but not colliding
Link LED: On when 100M or 10M link ok
Collision LED: Blinks at 20Hz to indicate a collision
7.10 Reset Operation
There are two ways to reset the STE100P. First, for hardware reset, the STE100P can be reset via RESET
pin (pin 28). The active low Reset input signal is required at least 1 ms to ensure proper reset operation.
Second, for software reset, when bit 15 of register PR0 is set to 1, the STE100P will reset entire circuits
and registers to their default values, then clear the bit 15 of PR0 to 0, and set the RIP output pin 29 to logic
1. Both hardware and software reset operations initialize all registers to their default values. This process
includes re-evaluation of all hardware-configurable registers. Logic levels on several I/O pins are detected
during hardware reset period to determine the initial functionality of STE100P. Some of these pins are
used as outputs after the reset operation. Care must be taken to ensure that the configuration setup will
not interfere with normal operation. Dedicated configuration pins can be tied to the Vcc or ground directly.
Configuration pins multiplexed with LED outputs should be weakly pulled up or weakly pulled down
through resistors as shown in the following circuits.
Figure 5.
Figure 6.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com