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MPC8315CVRADDA Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc |
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MPC8315CVRADDA Datasheet(HTML) 35 Page - Freescale Semiconductor, Inc |
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35 / 106 page  MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2 Freescale Semiconductor 35 Ethernet: Three-Speed Ethernet, MII Management Table 35. SGMII DC Transmitter Electrical Characteristics Parameter Symbol Min Typ Max Unit Note Supply Voltage XCOREVDD 0.95 1.0 1.05 V — Output high voltage VOH — — XCOREVDD-Typ/2 + |VOD|-max/2 mV 1 Output low voltage VOL XCOREVDD-Typ/2 - |VOD|-max/2 —— mV 1 Output ringing VRING —— 10 % — Output differential voltage2, 3, 5 |VOD| 323 500 725 mV Equalization setting: 1.0x 296 459 665 Equalization setting: 1.09x 269 417 604 Equalization setting: 1.2x 243 376 545 Equalization setting: 1.33x 215 333 483 Equalization setting: 1.5x 189 292 424 Equalization setting: 1.71x 162 250 362 Equalization setting: 2.0x Output offset voltage VOS 425 500 575 mV 1, 4 Output impedance (single-ended) RO 40 — 60 — Mismatch in a pair RO —— 10 % — Change in VOD between “0” and “1” |VOD|— — 25 mV — Change in VOS between “0” and “1” VOS —— 25 mV — Output current on short to GND ISA, ISB —— 40 mA — Note: 1. This will not align to DC-coupled SGMII. XCOREVDD-Typ=1.0V. 2. |VOD| = |VTXn - VTXn|. |VOD| is also referred as output differential peak voltage. VTX-DIFFp-p = 2*|VOD|. 3. The |VOD| value shown in the table assumes the following transmit equalization setting in the TXEQA (for SerDes lane A) or TXEQE (for SerDes lane E) bit field of MPC8315E’s SerDes Control Register 0: • The LSbits (bit [1:3]) of the above bit field is set based on the equalization setting shown in table. 4. VOS is also referred to as output common mode voltage. 5. The |VOD| value shown in the Typ column is based on the condition of XCOREVDD-Typ=1.0V, no common mode offset variation (VOS = 500 mV), SerDes transmitter is terminated with 100- differential load between TX[n] and TX[n]. |
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