AN3255

Application description

Doc ID 17784 Rev 1

7/24

1.2.2

time needed to complete the exchange is not fixed as it depends on the tag command

format. To know when the exchange is complete before starting reading the data in the

Input/Output Frame register, the bus master uses an Ack polling sequence that performs the

following actions:

1.

Initial condition: a radio frequency data exchange is in progress.

2.

Step 1: the master issues a START condition followed by the first byte of the new

instruction (Device Select Code plus R/W bit = 1) (see Appendix A: I2C memory

addressing).

3.

Step 2: if the CR14 is busy, no Ack is returned and the master goes back to Step 1. If

the CR14 has completed the radio frequency data exchange, it responds by sending

back an ACK, thus indicating that it is ready to receive the second part of the next

instruction (the first byte of this instruction has been sent during Step 1).

Figure 2 shows the detailed I²C Ack polling flowchart.

01h

Input/Output Frame

register

36 bytes

W

Store and send request

frame to the tag. Wait for

tag answer frame

R

Transfer tag answered

frame data to host

02h

ST reserved

N/A

W

ST reserved, must not be

used

R

03h

Slot Marker register

1 byte

W

Launch the automated anti-

collision process from

Slot_0 to Slot_15

R

Return FFh

04h

ST reserved

N/A

R and W

ST reserved, must not be

used

05h

ST reserved

N/A

R and W

ST reserved, must not be

used

Table 1.

CR14 control registers (continued)

Address

Description

Access

Purpose