ST7FOXU0 datasheet(67/123 Pages) STMICROELECTRONICS

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ST7FOXU0

On-chip peripherals

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10.1.6

Low power modes

Table 22.

Effect on Lite timer

10.1.7

Interrupts

Table 23.

Interrupt events

Note:

The TBF and ICF interrupt events are connected to separate interrupt vectors (see

Interrupts chapter). They generate an interrupt if the enable bit is set in the LTCSR register

and the interrupt mask in the CC register is reset (RIM instruction).

Figure 31.

Input capture timing diagram

10.1.8

Lite Timer Control/Status Register (LTCSR)

Reset Value: 0000 0x00 (0xh)

Mode

Description

Wait

No effect on Lite timer

Active-halt

No effect on Lite timer

Halt

Lite timer stops counting

Interrupt Event

Event

Flag

Enable

Control

Bit

Exit

from

Wait

Exit

from

Halt

Exit

from

Active-Halt

Timebase event

TBF

TBIE

Yes

IC Event

ICF

ICIE

Yes

0004h

13-bit COUNTER

0001h

fOSC

xxh

0002h

0003h

0005h

0006h

0007h

04h

LTIC PIN

ICF FLAG

LTICR REGISTER

CLEARED

125ns

(@ 8MHz fOSC)

fCPU

BY S/W

07h

READING

LTIC REGISTER

ICIE

ICF

TBIE

TBF

WDGRF

WDGE

WDGD

Read/Write

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