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ST7FOXU0 Datasheet(PDF) 88 Page - STMicroelectronics

Part # ST7FOXU0
Description  1 additional output line
PDF  123 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7FOXU0 Datasheet(HTML) 88 Page - STMicroelectronics

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Instruction set
ST7FOXU0
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11.2
Instruction groups
The ST7 family devices use an Instruction Set consisting of 63 instructions. The instructions
may be subdivided into 13 main groups as illustrated in the following table:
Using a prebyte
The instructions are described with 1 to 4 bytes.
In order to extend the number of available opcodes for an 8-bit CPU (256 opcodes), three
different prebyte opcodes are defined. These prebytes modify the meaning of the instruction
they precede.
The whole instruction becomes by:
PC-2 End of previous instruction
PC-1 Prebyte
PC Opcode
PC+1 Additional word (0 to 2) according to the number of bytes required to compute
the effective address
These prebytes enable instruction in Y as well as indirect addressing modes to be
implemented. They precede the opcode of the instruction in X or the instruction using direct
addressing mode. The prebytes are:
PDY 90 Replace an X based instruction using immediate, direct, indexed, or inherent
addressing mode by a Y one.
PIX 92 Replace an instruction using direct, direct bit or direct relative addressing mode
to an instruction using the corresponding indirect addressing mode.
It also changes an instruction using X indexed addressing mode to an instruction using
indirect X indexed addressing mode.
PIY 91 Replace an instruction using X indirect indexed addressing mode by a Y one.
Table 37.
ST7 instruction set
Load and Transfer
LD
CLR
Stack operation
PUSH
POP
RSP
Increment/decrement
INC
DEC
Compare and tests
CP
TNZ
BCP
Logical operations
AND
OR
XOR
CPL
NEG
Bit operation
BSET
BRES
Conditional bit test and branch
BTJT
BTJF
Arithmetic operations
ADC
ADD
SUB
SBC
MUL
Shift and rotate
SLL
SRL
SRA
RLC
RRC
SWAP
SLA
Unconditional jump or call
JRA
JRT
JRF
JP
CALL
CALLR
NOP
RET
Conditional branch
JRxx
Interruption management
TRAP
WFI
HALT
IRET
Condition Code Flag modification
SIM
RIM
SCF
RCF



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