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ST7FOXU0 Datasheet(PDF) 15 Page - STMicroelectronics |
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ST7FOXU0 Datasheet(HTML) 15 Page - STMicroelectronics |
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15 / 123 page  ST7FOXU0 Register and memory mapping 15/123 004Bh 004Ch 004Dh 004Eh 004Fh 0050h DM (4) DMCR DMSR DMBK1H DMBK1L DMBK2H DMBK2L DM Control Register DM Status Register DM Breakpoint Register 1 High DM Breakpoint Register 1 Low DM Breakpoint Register 2 High DM Breakpoint Register 2 Low 00h 00h 00h 00h 00h 00h R/W R/W R/W R/W R/W R/W 0051h to 007Fh Reserved area (47 bytes) 1. Legend: x=undefined, R/W=read/write. 2. The contents of the I/O port DR registers are readable only in output configuration. In input configuration, the values of the I/O pins are returned instead of the DR register contents. 3. The bits associated with unavailable pins must always keep their reset value. 4. For a description of the Debug Module registers, see ICC protocol reference manual. Table 3. ST7FOXU0 Hardware register map(1) (continued) Address Block Register label Register name Reset status Remarks |
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