ADRF6755ACPZ-R7 datasheet(34/48 Pages) AD

34 / 48 page

ADRF6755

Data Sheet

Rev. B | Page 34 of 48

Table 22. Register CR24 (Address 0x18), Autocalibration

Bit

Description

Set to 0

Set to 1

Set to 0

Disable autocalibration

0 = enable autocalibration (default)

1 = disable autocalibration

Table 23. Register CR25 (Address 0x19), Autocalibration Timer

Bit

Description

[7:0]

Autocalibration timer

Table 24. Register CR27 (Address 0x1B), LO Monitor Output

and LO Selection

Bit

Description

Set to 0

Frequency range; set according to Table 6

Set to 0

Power up LO monitor output

0 = power down (default)

1 = power up

[1:0]

Monitor output power into 50 Ω

00 = −24 dBm (default)

01 = −18 dBm

10 = −12 dBm

11 = −6 dBm

Table 25. Register CR28 (Address 0x1C), LO Selection

Bit

Description

Set to 0

Power down RFDIVIDER

0 = power up (default)

1 = power down

Set to 1

[2:0]

RFDIV1, set according to Table 6

Double-buffered. Loaded on a write to Register CR0.

Table 26. Register CR29 (Address 0x1D), Modulator

Bit

Description

Set to 1

Set to 0

Power up modulator

0 = power down (default)

1 = power up

Table 27. Register CR30 (Address 0x1E), Attenuator

Bit

Description

Set to 0

[5:0]

Attenuator A5 to Attenuator A0

000000 = 0 dB

000001 = 1 dB

000010 = 2 dB

…

011111 = 31 dB

110000 = 32 dB

110001 = 33 dB

…

111101 = 45 dB

111110 = 46 dB

111111 = 47 dB

Table 28. Register CR33 (Address 0x21), Revision Code1

Bit

Description

[7:0]

Revision code

Read-only register.

ADRF6755ACPZ-R7 Datasheet(PDF) 34 Page - Analog Devices

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