ADPL12005/ADPL12006

20V, 5A/6A Fully Integrated Synchronous Buck

Converters

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Absolute Maximum Ratings

SUP....................................................................-0.3V to +22V

EN ......................................................................-0.3V to +22V

BST to LX..........................................................-0.3V to +2.2V

BST ....................................................................-0.3V to +24V

LX.............................................................. -0.3V to SUP+0.3V

SYNCOUT............................................................-0.3V to +6V

SYNC ...................................................................-0.3V to +6V

VEA ...........................................................-0.3V to BIAS+0.3V

FB .............................................................-0.3V to BIAS+0.3V

OUT....................................................................-0.3V to +16V

PGOOD................................................................-0.3V to +6V

BIAS ................................................................. -0.3V to +2.2V

PGND to AGND ................................................ -0.3V to +0.3V

LX Continuous RMS Current................................................6A

ESD Protection

__Human Body Model ..................................................... ±2kV

__Charged Device Model...............................................±750V

__Continuous Power Dissipation (TA = +70°C, derate 34.48

mW/°C above +70°C.)................................................2758mW

__Operating Junction Temperature................ -40°C to +150°C

__Storage Temperature Range ..................... -65°C to +150°C

__Soldering Temperature (Soldering 10sec)................ +300°C

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or

any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

Package Information

Package Code

F173A3F+2F

Outline Number

21-100700

Land Pattern Number

90-100240

Thermal Resistance, JEDEC Board

Junction to Ambient (θJA)

38.41°C/W

Junction to Case (θJC)

10.35°C/W

Thermal Resistance, Four-Layer EV Kit Board

Junction to Ambient (θJA)

29°C/W

Junction to Case (θJC)

10.51°C/W

For the latest package outline information and land patterns (footprints), go to https://www.analog.com/en/design-center/packaging-

quality-symbols-footprints/package-index.html. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package

drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.

Package thermal resistances were obtained using both the four-layer EV kit as well as the method described in JEDEC specification

JESD51-7. For detailed information on package thermal considerations, refer to https://www.analog.com/en/technical-articles/thermal-

characterization-of-ic-packages.html.