V62SLASH12615-01XE-R datasheet(53/98 Pages) TI1

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DP83848-EP

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SLLSEC6E – SEPTEMBER 2012 – REVISED JUNE 2019

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Detailed Description

5.5.1.3.4 Carrier Sense

Carrier Sense (CRS) may be asserted due to receive activity once valid data is detected via the squelch

function.

For 10-Mbps Half Duplex operation, CRS is asserted during either packet transmission or reception.

For 10-Mbps Full Duplex operation, CRS is asserted only during receive activity.

CRS is deasserted following an end of packet.

5.5.1.3.5 Normal Link Pulse Detection and Generation

The link pulse generator produces pulses as defined in the IEEE 802.3 10BASE-T standard. Each link

pulse is nominally 100 ns in duration and transmitted every 16 ms in the absence of transmit data.

Link pulses are used to check the integrity of the connection with the remote end. If valid link pulses are

not received, the link detector disables the 10BASE-T twisted-pair transmitter, receiver and collision

detection functions.

When the link integrity function is disabled (FORCE_LINK_10 of the 10BTSCR register), a good link is

forced and the 10BASE-T transceiver will operate regardless of the presence of link pulses.

5.5.1.3.6 Jabber Function

The jabber function monitors the output of DP83848-EP and disables the transmitter if it tries to transmit a

packet of longer than legal size. A jabber timer monitors the transmitter and disables the transmission if

the transmitter is active for approximately 85 ms.

Once disabled by the Jabber function, the transmitter stays disabled for the entire time that the ENDEC

module's internal transmit enable is asserted. This signal has to be de-asserted for approximately 500 ms

(the “unjab” time) before the Jabber function re-enables the transmit outputs.

The Jabber function is only relevant in 10BASE-T mode.

5.5.1.3.7 Automatic Link Polarity Detection and Correction

The DP83848-EP's 10BASE-T transceiver module incorporates an automatic link polarity detection circuit.

When three consecutive inverted link pulses are received, bad polarity is reported.

A polarity reversal can be caused by a wiring error at either end of the cable, usually at the Main

Distribution Frame (MDF) or patch panel in the wiring closet.

The bad polarity condition is latched in the 10BTSCR register. The DP83848-EP's 10BASE-T transceiver

module corrects for this error internally and will continue to decode received data correctly. This eliminates

the need to correct the wiring error immediately.

5.5.1.3.8 Transmit and Receive Filtering

External 10BASE-T filters are not required when using the DP83848-EP, as the required signal

conditioning is integrated into the device.

Only isolation transformers and impedance matching resistors are required for the 10BASE-T transmit and

receive interface. The internal transmit filtering ensures that all the harmonics in the transmit signal are

attenuated by at least 30 dB.

5.5.1.3.9 Transmitter

The encoder begins operation when the Transmit Enable input (TX_EN) goes high and converts NRZ data

to pre-emphasized Manchester data for the transceiver. For the duration of TX_EN, the serialized

Transmit Data (TXD) is encoded for the transmit-driver pair (PMD Output Pair). TXD must be valid on the

rising edge of Transmit Clock (TX_CLK). Transmission ends when TX_EN deasserts. The last transition is

always positive; it occurs at the center of the bit cell if the last bit is a one, or at the end of the bit cell if the

last bit is a zero.

V62/12615-01XE-R Datasheet(PDF) 53 Page - Texas Instruments

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