DSP5685XUM datasheet(9/64 Pages) FREESCALE

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Introduction

56858 Technical Data, Rev. 6

Freescale Semiconductor

Part 3 Signals and Package Information

All digital inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are

enabled by default. Exceptions:

1. When a pin has GPIO functionality, the pull-up may be disabled under software control.

2. MODE A, MODE B and MODE C pins have no pull-up.

3. TCK has a weak pull-down circuit always active.

4. Bidirectional I/O pullups automatically disable when the output is enabled.

This table is presented consistently with the Signals Identified by Functional Group figure.

1. BOLD entries in the Type column represents the state of the pin just out of reset.

2. Output(Z) means an output in a High-Z condition.

Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA

Signal

Name

BGA

Pin No.

LQFP

Pin No.

Type

Description

VDD

Logic Power (VDD)—These pins provide power to the internal

structures of the chip, and should all be attached to VDD.

VDD

F12

VDD

J12

VDD

E12

109

VDD

A12

125

VSS

Logic Power–Ground (VSS)—These pins provide grounding for the

internal structures of the chip and should all be attached to VSS.

VSS

D12

VSS

K12

126

VSS

127

DSP5685XUM Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc

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