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DSP5685XUM Datasheet(PDF) 13 Page - Freescale Semiconductor, Inc |
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DSP5685XUM Datasheet(HTML) 13 Page - Freescale Semiconductor, Inc |
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13 / 64 page ![]() Introduction 56858 Technical Data, Rev. 6 Freescale Semiconductor 13 HD0 GPIOB0 J3 33 Input Input/Output Host Address (HD0)—This input provides data selection for HI registers. This pin is disconnected internally during reset. Port B GPIO (0)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. HD1 GPIOB1 K2 34 Input Input/Output Host Address (HD1)—This input provides data selection for HI registers. This pin is disconnected internally during reset. Port B GPIO (1)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. HD2 GPIOB2 L2 35 Input Input/Output Host Address (HD2)—This input provides data selection for HI registers. This pin is disconnected internally during reset. Port B GPIO (2)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. HD3 GPIOB3 J4 40 Input Input/Output Host Address (HD3)—This input provides data selection for HI registers. This pin is disconnected internally during reset. Port B GPIO (3)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. HD4 GPIOB4 L4 41 Input Input/Output Host Address (HD4)—This input provides data selection for HI registers. This pin is disconnected internally during reset. Port B GPIO (4)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. HD5 GPIOB5 J5 42 Input Input/Output Host Address (HD5)—This input provides data selection for HI registers. This pin is disconnected internally during reset. Port B GPIO (5)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA Signal Name BGA Pin No. LQFP Pin No. Type Description |
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