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PIC16F753 Datasheet(PDF) 80 Page - Microchip Technology |
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PIC16F753 Datasheet(HTML) 80 Page - Microchip Technology |
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80 / 230 page ![]() PIC16F753/HV753 DS40001709C-page 80 2013-2015 Microchip Technology Inc. 10.4 Register Definitions: CCP Control REGISTER 10-1: CCP1CON: CCP1 CONTROL REGISTER U-0 U-0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 — — DC1B<1:0> CCP1M<3:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Reset ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-6 Unimplemented: Read as ‘0’ bit 5-4 DC1B<1:0>: PWM Duty Cycle Least Significant bits Capture mode: Unused Compare mode: Unused PWM mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L. bit 3-0 CCP1M<3:0>: CCP1 Mode Select bits 0000 = Capture/Compare/PWM off (resets CCP1 module) 0001 = Reserved 0010 = Compare mode: toggle output on match 0011 = Reserved 0100 = Capture mode: every falling edge 0101 = Capture mode: every rising edge 0110 = Capture mode: every 4th rising edge 0111 = Capture mode: every 16th rising edge 1000 = Compare mode: initialize CCP1 pin low; set output on compare match (set CCP1IF) 1001 = Compare mode: initialize CCP1 pin high; clear output on compare match (set CCP1IF) 1010 = Compare mode: generate software interrupt only; CCP1 pin reverts to I/O state 1011 = Compare mode: Special Event Trigger (CCP1 resets Timer, sets CCP1IF bit, and starts A/D conversion if A/D module is enabled) 11xx = PWM mode |
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