LP1071 datasheet(8/32 Pages) FREESCALE

8 / 32 page

LP1071 Advance Information, Rev. 0.5

Freescale Semiconductor

PRELIMINARY

Functional Description

3.4.2

I/Q DAC

I/Q DAC specifications are shown in Table 4.

3.4.3

RSSI ADC

RSSI ADC specifications are shown in Table 5.

Table 4. I/Q DAC

Parameter

Condition

Min

Typ

Max

Units

Resolution

—

bit

Maximum Update rate

—

MHz

3dB Signal Bandwidth

—

MHz

Output common-mode voltage

—

0.7

Vcmo1

1 See Analog input pin for definition of I/Q DAC output common-mode level.

1.5

Load

—

Kohm

Integral Nonlinearity (INL)

—

±1.0

—

LSB

Differential Nonlinearity (DNL)

—

± 0.5

—

LSB

Total Harmonic Distortion (THD)

Fin= 1MHz

Fin= 10MHz

—

-48.5

-47

—

SNR

Fin= 1MHz

Fin= 10MHz

—

48.5

—

ENOB

Fin= 1MHz

Fin= 10MHz

—

7.2

7.0

—

bit

Channel-to-Channel mismatch

Gain

Phase

—

0.2

0.5

—

Degree

DC offset after calibration

—

-1

—

LSB

Wake-up time

From Shutdown

From Standby

—

µs

Table 5. RSSI ADC Specifications

Parameter

Condition

Min

Typ

Max

Units

Resolution

—

bit

Maximum Sampling Frequency

—

MHz

Input Voltage Range

—

Latency

—

cycles

Integral Nonlinearity (INL)

—

±1.0

—

LSB

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