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ADE5166 Datasheet(PDF) 129 Page - Analog Devices |
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ADE5166 Datasheet(HTML) 129 Page - Analog Devices |
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129 / 156 page ![]() ADE5166/ADE5169/ADE5566/ADE5569 Rev. B | Page 129 of 156 Table 144. Common Baud Rates Using the UART Timer with a 4.096 MHz PLL Clock Ideal Baud CD SBTH DIV SBAUDT SBAUDF % Error 115,200 0 0 1 0x01 0x87 +0.16 115,200 1 0 0 0x00 0x87 +0.16 57,600 0 0 2 0x02 0x87 +0.16 57,600 1 0 1 0x01 0x87 +0.16 38,400 0 0 2 0x02 0xAB −0.31 38,400 1 0 1 0x01 0xAB −0.31 38,400 2 0 0 0x00 0xAB −0.31 19,200 0 0 3 0x03 0xAB −0.31 19,200 1 0 2 0x02 0xAB −0.31 19,200 2 0 1 0x01 0xAB −0.31 19,200 3 0 0 0x00 0xAB −0.31 9600 0 0 4 0x04 0xAB −0.31 9600 1 0 3 0x03 0xAB −0.31 9600 2 0 2 0x02 0xAB −0.31 9600 3 0 1 0x01 0xAB −0.31 9600 4 0 0 0x00 0xAB −0.31 4800 0 0 5 0x05 0xAB −0.31 4800 1 0 4 0x04 0xAB −0.31 4800 2 0 3 0x03 0xAB −0.31 4800 3 0 2 0x02 0xAB −0.31 4800 4 0 1 0x01 0xAB −0.31 4800 5 0 0 0x00 0xAB −0.31 2400 0 0 6 0x06 0xAB −0.31 2400 1 0 5 0x05 0xAB −0.31 2400 2 0 4 0x04 0xAB −0.31 2400 3 0 3 0x03 0xAB −0.31 2400 4 0 2 0x02 0xAB −0.31 2400 5 0 1 0x01 0xAB −0.31 2400 6 0 0 0x00 0xAB −0.31 300 0 2 7 0x17 0xAB −0.31 300 1 1 7 0x0F 0xAB −0.31 300 2 0 7 0x07 0xAB −0.31 300 3 0 6 0x06 0xAB −0.31 300 4 0 5 0x05 0xAB −0.31 300 5 0 4 0x04 0xAB −0.31 300 6 0 3 0x03 0xAB −0.31 300 7 0 2 0x02 0xAB −0.31 |
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