STLUX385ATR datasheet(21/126 Pages) STMICROELECTRONICS

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STLUX

Product overview

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5.2.5

Debug module

The non-intrusive debugging module is fully controllable by the external target emulator.

Besides memory and peripheral operation, the CPU operation can also be monitored in

real-time by means of shadow registers.



R/W of RAM and peripheral registers in real-time



R/W for all resources when the application is stopped



Breakpoints on all program memory instructions (software breakpoints), except for the

interrupt vector table



Two advanced breakpoints and 23 predefined breakpoint configurations

5.3

Basic peripherals

Section 5.3.1 and Section 5.3.2 describe the basic peripherals accessed by the internal

CPU controller.

5.3.1

Vectored interrupt controller



Nested interrupts with three software priority levels



21 interrupt vectors with hardware priority



Two vectors for 12 external maskable or un-maskable interrupt request lines



Trap and reset interrupts

5.3.2

Timers

The STLUX family provides several timers which are used by software and do not interact

directly with the SMED and the PWM generation.

System timers

The system timer consists of a 16-bit autoreload counter driven by a programmable

prescaled clock and operating in one shoot or free running operating mode. The timer is

used to provide the IC time base system clock, with an interrupt generation on timer

overflow events.

Auxiliary timer

The auxiliary timer is a light timer with elementary functionality. The time base frequency is

provided by the CCO clock logic (configurable with a different source clock and prescale

division factors), while the interrupt functionality is supplied by an interrupt edge detection

logic similarly to the solution adopted for the Port P0/P2.

The timer has the following main features:



Free running mode



Up counter



Timer prescaler 8-bit



Interrupt timer capability:

–

Vectored interrupt

–

Interrupt IRQ/NMI or polling mode



Timer pulse configurable as a clock output signal via the CCO primary pin

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