 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
LAN9252/ML Datasheet(PDF) 271 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
LAN9252/ML Datasheet(HTML) 271 Page - Microchip Technology |
|
|
271 / 329 page  2015 Microchip Technology Inc. DS00001909A-page 271 LAN9252 12.14.59.8 FMMUx Activate Register 12.14.59.9 FMMUx Reserved Register Note: For EtherCAT Core CSR registers longer than one byte, the LSB has the lowest address and the MSB the highest address. Offset: FMMUx Base Address +Ch Size: 8 bits Bits Description ECAT Type PDI Type Default 7:1 RESERVED Write as 0. RO RO 0000000b 0 FMMU Activation 0: FMMUx Deactivated 1: FMMUx Activated. FMMUx checks logical addressed blocks to be mapped according to the configured mapping. R/W RO 0b Offset: FMMUx Base Address +Dh-Fh Size: 24 bits Bits Description ECAT Type PDI Type Default 23:0 RESERVED Write as 0. RO RO 000000h |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Indian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
